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905f1c0392
* Parsing of shadow registers from VBIOS * Partial devinit engine interpreter implementation JIRA DNVGPU-117 Change-Id: I42179748889f17d674ad0a986e81c418b3b8df11 Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1214956 Reviewed-on: http://git-master/r/1237293 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
32 lines
855 B
C
32 lines
855 B
C
/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef NVGPU_BIOS_GP106_H
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#define NVGPU_BIOS_GP106_H
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struct gpu_ops;
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#define INIT_DONE 0x71
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#define INIT_RESUME 0x72
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#define INIT_CONDITION 0x75
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#define INIT_XMEMSEL_ZM_NV_REG_ARRAY 0x8f
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struct condition_entry {
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u32 cond_addr;
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u32 cond_mask;
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u32 cond_compare;
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} __packed;
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void gp106_init_bios(struct gpu_ops *gops);
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#endif
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