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GPFIFO HW with fifo size N can actually accept N-1 entries. Also, kernel can insert two extra entries, before and after the user GPFIFOs. So, GPFIFO with N size can accept max N-3 user gpfifos. Bug 1613125 Change-Id: I173526afb70dddf1b2b9ec0a99890335c81f0e02 Signed-off-by: Gagan Grover <ggrover@nvidia.com> Reviewed-on: http://git-master/r/725380 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>