mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-24 10:34:43 +03:00
2dfa05ba50
- correct user register base l->usermode_regs. It should be bar0 address plus .usermode.bus_base(). .bus_base() returns user register base offset relative to bar0. - correct .usermode.base for tu104. .base should be user register base relative to virtual function base. - use nvgpu_usermode_writel for tu104 ring doorbell. Jira GVSCI-4650 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Change-Id: Iba98063c4a5cc007459319b0311e546ff10604a4 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2403813 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>