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46457ea536
1) Currently only one profiler object should be allowed. Enable/Disable/Reset CAU is using whole GR space for both MIG and legacy mode. Need to convert broadcast address to GR specific unicast programming when NvGpu supports more than one profiler object at a time. 2) Used nvgpu_gr_exec_with_err_for_instance() for update_smpc_global_mode(). JIRA NVGPU-5656 Change-Id: If9c2af1459458c031c7cc269e1a89f527b972d7c Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2554590 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: Dinesh T <dt@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
61 lines
2.0 KiB
C
61 lines
2.0 KiB
C
/*
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* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_PROFILER_VGPU_H
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#define NVGPU_PROFILER_VGPU_H
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int vgpu_profiler_bind_hwpm(struct gk20a *g,
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u32 gr_instance_id,
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bool is_ctxsw,
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struct nvgpu_tsg *tsg);
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int vgpu_profiler_unbind_hwpm(struct gk20a *g,
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u32 gr_instance_id,
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bool is_ctxsw,
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struct nvgpu_tsg *tsg);
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int vgpu_profiler_bind_hwpm_streamout(struct gk20a *g,
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u32 gr_instance_id,
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bool is_ctxsw,
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struct nvgpu_tsg *tsg,
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u64 pma_buffer_va,
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u32 pma_buffer_size,
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u64 pma_bytes_available_buffer_va);
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int vgpu_profiler_unbind_hwpm_streamout(struct gk20a *g,
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u32 gr_instance_id,
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bool is_ctxsw,
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struct nvgpu_tsg *tsg,
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void *pma_bytes_available_buffer_cpuva,
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bool smpc_reserved);
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int vgpu_profiler_bind_smpc(struct gk20a *g,
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u32 gr_instance_id,
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bool is_ctxsw,
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struct nvgpu_tsg *tsg);
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int vgpu_profiler_unbind_smpc(struct gk20a *g,
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u32 gr_instance_id,
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bool is_ctxsw,
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struct nvgpu_tsg *tsg);
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#endif
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