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git://nv-tegra.nvidia.com/linux-nvgpu.git
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e81a36e56a
It's preparing to add bellow CFLAGS:
-Werror -Wall -Wextra \
-Wmissing-braces -Wpointer-arith -Wundef \
-Wconversion -Wsign-conversion \
-Wformat-security \
-Wmissing-declarations -Wredundant-decls -Wimplicit-fallthrough
Jira GVSCI-11640
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: Ia16ef186da1e97badff9dd0bf8cbd6700dd77b15
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2555057
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
76 lines
2.4 KiB
C
76 lines
2.4 KiB
C
/*
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* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/types.h>
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#include <nvgpu/io.h>
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#include <nvgpu/log.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/channel.h>
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#include <nvgpu/io_usermode.h>
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#include <nvgpu/runlist.h>
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#include "usermode_tu104.h"
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#include <nvgpu/hw/tu104/hw_usermode_tu104.h>
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#include <nvgpu/hw/tu104/hw_ctrl_tu104.h>
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#include <nvgpu/hw/tu104/hw_func_tu104.h>
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u64 tu104_usermode_base(struct gk20a *g)
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{
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(void)g;
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return func_cfg0_r();
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}
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u64 tu104_usermode_bus_base(struct gk20a *g)
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{
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(void)g;
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return U64(func_full_phys_offset_v() + func_cfg0_r());
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}
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void tu104_usermode_setup_hw(struct gk20a *g)
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{
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u32 val;
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val = nvgpu_readl(g, ctrl_virtual_channel_cfg_r(0));
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val |= ctrl_virtual_channel_cfg_pending_enable_true_f();
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nvgpu_writel(g, ctrl_virtual_channel_cfg_r(0), val);
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}
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u32 tu104_usermode_doorbell_token(struct nvgpu_channel *ch)
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{
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struct gk20a *g = ch->g;
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struct nvgpu_fifo *f = &g->fifo;
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u32 hw_chid = f->channel_base + ch->chid;
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return ctrl_doorbell_vector_f(hw_chid) |
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ctrl_doorbell_runlist_id_f(ch->runlist->id);
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}
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void tu104_usermode_ring_doorbell(struct nvgpu_channel *ch)
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{
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nvgpu_log_info(ch->g, "channel ring door bell %d, runlist %d",
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ch->chid, ch->runlist->id);
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nvgpu_usermode_writel(ch->g, func_doorbell_r(),
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ch->g->ops.usermode.doorbell_token(ch));
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}
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