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Separate out new API gr_gp10b_set_ctxsw_preemption_mode() which will check requested preemption modes and take appropriate action for each preemption mode This API will also do some sanity checking for valid preemption modes and combinations Define API set_preemption_mode() for gp10b which will set the preemption modes passed as argument and then use gr_gp10b_set_ctxsw_preemption_mode() and update_ctxsw_preemption_mode() to update preemption mode Legacy path from gr_gp10b_alloc_gr_ctx() will convert flags NVGPU_ALLOC_OBJ_FLAGS_* into appropriate preemption modes and then call gr_gp10b_set_ctxsw_preemption_mode() New API set_preemption_mode() will use new flags NVGPU_GRAPHICS/COMPUTE_PREEMPTION_MODE_* and set and update ctxsw preemption mode In gr_gp10b_update_ctxsw_preemption_mode(), update graphics context to set CTA premption mode if mode NVGPU_COMPUTE_PREEMPTION_MODE_CTA is set Also, define preemption modes in nvgpu-t18x.h and use them everywhere Remove old definitions of modes from gr_gp10b.h Bug 1646259 Change-Id: Ib4dc1fb9933b15d32f0122a9e52665b69402df18 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1131806 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
73 lines
2.5 KiB
C
73 lines
2.5 KiB
C
/*
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* NVGPU Public Interface Header
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*
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* Copyright (c) 2011-2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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/* This file is meant to extend nvgpu.h, not replace it
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* as such, be sure that nvgpu.h is actually the file performing the
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* inclusion, to the extent that's possible.
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*/
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#ifndef _UAPI__LINUX_NVGPU_IOCTL_H
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# error "This file is to be included within nvgpu.h only."
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#endif
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#ifndef _UAPI__LINUX_NVGPU_T18X_IOCTL_H_
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#define _UAPI__LINUX_NVGPU_T18X_IOCTL_H_
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#define NVGPU_GPU_ARCH_GP100 0x00000130
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#define NVGPU_GPU_IMPL_GP10B 0x0000000B
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/*
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* this flag is used in struct nvgpu_as_map_buffer_ex_args
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* to specify IO coherence
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*/
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#define NVGPU_AS_MAP_BUFFER_FLAGS_IO_COHERENT (1 << 4)
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/*
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* this flag is used in struct nvgpu_alloc_gpfifo_args
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* to enable re-playable faults for that channel
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*/
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#define NVGPU_ALLOC_GPFIFO_FLAGS_REPLAYABLE_FAULTS_ENABLE (1 << 2)
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/* Flags in nvgpu_alloc_obj_ctx_args.flags */
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#define NVGPU_ALLOC_OBJ_FLAGS_GFXP (1 << 1)
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#define NVGPU_ALLOC_OBJ_FLAGS_CILP (1 << 2)
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/* Flags in nvgpu_preemption_mode_args.graphics_preempt_flags */
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#define NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP BIT(1)
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/* Flags in nvgpu_preemption_mode_args.compute_preempt_flags */
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#define NVGPU_COMPUTE_PREEMPTION_MODE_CILP BIT(2)
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/* SM LRF ECC is enabled */
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#define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF (1ULL << 60)
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/* SM SHM ECC is enabled */
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#define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_SHM (1ULL << 61)
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/* TEX ECC is enabled */
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#define NVGPU_GPU_FLAGS_ECC_ENABLED_TEX (1ULL << 62)
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/* L2 ECC is enabled */
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#define NVGPU_GPU_FLAGS_ECC_ENABLED_LTC (1ULL << 63)
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/* All types of ECC are enabled */
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#define NVGPU_GPU_FLAGS_ALL_ECC_ENABLED \
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(NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF | \
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NVGPU_GPU_FLAGS_ECC_ENABLED_SM_SHM | \
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NVGPU_GPU_FLAGS_ECC_ENABLED_TEX | \
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NVGPU_GPU_FLAGS_ECC_ENABLED_LTC)
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/* Channel event_id in nvgpu_channel_events_ctrl_ext_args */
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#define NVGPU_IOCTL_CHANNEL_EVENT_ID_CILP_PREEMPTION_STARTED 3
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#define NVGPU_IOCTL_CHANNEL_EVENT_ID_CILP_PREEMPTION_COMPLETE 4
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#endif /* _UAPI__LINUX_NVGPU_T18X_IOCTL_H_ */
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