Vinod G 31c8f09241 gpu: nvgpu: gr.intr MISRA fixes for Rule 16.x ...

Fix MISRA Rule 16.x violations in gr.intr unit
All statements to be well-formed with terminating break statement for
every switch-clause.

Jira NVGPU-3395

Change-Id: Iad3a29628f44dfe64cfe916b5a8007a679c2fdc7
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2114160
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2019-05-08 14:16:04 -07:00

..

nvgpu

gpu: nvgpu: gr.intr MISRA fixes for Rule 16.x

2019-05-08 14:16:04 -07:00

Makefile

nvgpu: use kernel overlay features

2017-10-29 11:00:55 -07:00