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e0a6000456
Update SW quiesce as follows: - After waking up sw_quiesce_thread, nvgpu_sw_quiesce masks interrupts, then disables and preempts runlists without lock. There could be still a concurrent thread that would re-enable the runlist by accident. This is very unlikely and would mean we are not in mission mode anyway. - In sw_quiesce_thread, wait NVGPU_SW_QUIESCE_TIMEOUT_MS, to leave some time for interrupt handler to set error notifier (in case of HW error interrupt). Then disable and preempt runlists, and set error notifier for remaining channels before exiting the process. Also modified nvgpu_can_busy to return false in case SW quiesce is pending. This will make subsequent devctl to fail. Jira NVGPU-4512 Change-Id: I36dd554485f3b9b08f740f352f737ac4baa28746 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2266389 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
118 lines
4.0 KiB
C
118 lines
4.0 KiB
C
/*
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* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_BUG_H
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#define NVGPU_BUG_H
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#ifdef __KERNEL__
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#include <linux/bug.h>
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#else
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#include <nvgpu/posix/bug.h>
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#endif
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#include <nvgpu/cov_whitelist.h>
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#include <nvgpu/list.h>
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/*
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* Define an assert macro that code within nvgpu can use.
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*
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* The goal of this macro is for debugging but what that means varies from OS
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* to OS. On Linux wee don't want to BUG() for general driver misbehaving. BUG()
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* is a very heavy handed tool - in fact there's probably no where within the
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* nvgpu core code where it makes sense to use a BUG() when running under Linux.
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*
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* However, on QNX (and POSIX) BUG() will just kill the current process. This
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* means we can use it for handling bugs in nvgpu.
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*
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* As a result this macro varies depending on platform.
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*/
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#if defined(__KERNEL__)
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#define nvgpu_assert(cond) ((void) WARN_ON(!(cond)))
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#else
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/*
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* A static inline for POSIX/QNX/etc so that we can hide the branch in BUG_ON()
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* from the branch analyzer. This prevents unit testing branch analysis from
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* marking this as an untested branch everywhere the nvgpu_assert() macro is
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* used. Similarly for MISRA this hides the messy BUG_ON() macro from users of
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* this function. This means the MISRA scanner will only trigger 1 issue for
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* this instead of 1 for every place it's used.
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*
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* When this assert fails the function will not return.
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*/
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static inline void nvgpu_assert(bool cond)
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{
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, NVGPU_MISRA(Rule, 14_4), "Bug 2277532")
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, NVGPU_MISRA(Rule, 15_6), "Bug 2277532")
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BUG_ON(!cond);
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_MISRA(Rule, 14_4))
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_MISRA(Rule, 15_6))
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}
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#endif
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/*
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* Define simple macros to force the consequences of a failed assert
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* (presumably done in a previous if statement).
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* The exact behavior will be OS dependent. See above.
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*/
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#define nvgpu_do_assert() \
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NVGPU_COV_WHITELIST(false_positive, NVGPU_MISRA(Rule, 10_3), "Bug 2623654") \
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nvgpu_assert(false)
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/*
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* Define compile-time assert check.
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*/
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#define ASSERT_CONCAT(a, b) a##b
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#define ASSERT_ADD_INFO(a, b) ASSERT_CONCAT(a, b)
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#define nvgpu_static_assert(e) \
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enum { \
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ASSERT_ADD_INFO(assert_line_, __LINE__) = 1 / (!!(e)) \
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}
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struct gk20a;
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#define nvgpu_do_assert_print(g, fmt, arg...) \
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do { \
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nvgpu_err(g, fmt, ##arg); \
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nvgpu_do_assert(); \
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} while (false)
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struct nvgpu_bug_cb
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{
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void (*cb)(void *arg);
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void *arg;
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struct nvgpu_list_node node;
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};
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static inline struct nvgpu_bug_cb *
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nvgpu_bug_cb_from_node(struct nvgpu_list_node *node)
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{
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return (struct nvgpu_bug_cb *)
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((uintptr_t)node - offsetof(struct nvgpu_bug_cb, node));
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};
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#ifdef __KERNEL__
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static inline void nvgpu_bug_exit(int status) { }
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static inline void nvgpu_bug_register_cb(struct nvgpu_bug_cb *cb) { }
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static inline void nvgpu_bug_unregister_cb(struct nvgpu_bug_cb *cb) { }
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#endif
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#endif /* NVGPU_BUG_H */
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