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068e00749b
Field value of pbdma_config_userd_writeback_enable is changing from 0x1 to 0x0 for nvgpu-next. So, - Update config_userd_writeback_enable() hal to accept u32 value. - Update config_userd_writeback_enable() hal to return modified value after setting pbdma_config_userd_writeback_enable field. Jira NVGPU-5162 Change-Id: I94efa20c34bb867f185778c973bd52b86902b32c Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2330160 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
43 lines
1.8 KiB
C
43 lines
1.8 KiB
C
/*
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* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_PBDMA_GV11B_H
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#define NVGPU_PBDMA_GV11B_H
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#include <nvgpu/types.h>
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struct gk20a;
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void gv11b_pbdma_setup_hw(struct gk20a *g);
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void gv11b_pbdma_intr_enable(struct gk20a *g, bool enable);
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bool gv11b_pbdma_handle_intr_0(struct gk20a *g, u32 pbdma_id, u32 pbdma_intr_0,
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u32 *error_notifier);
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bool gv11b_pbdma_handle_intr_1(struct gk20a *g, u32 pbdma_id, u32 pbdma_intr_1,
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u32 *error_notifier);
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u32 gv11b_pbdma_channel_fatal_0_intr_descs(void);
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u32 gv11b_pbdma_get_fc_pb_header(void);
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u32 gv11b_pbdma_get_fc_target(void);
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u32 gv11b_pbdma_set_channel_info_veid(u32 subctx_id);
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u32 gv11b_pbdma_config_userd_writeback_enable(u32 v);
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#endif /* NVGPU_PBDMA_GV11B_H */
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