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b2c8827c65
NETLIST_REGIONID_SW_CTX_LOAD writes update gr_gpcs_tpcs_tex_m_dbg2_r to default value that keeps rd coalesce enabled for LG & SU. Disable rd coalesce for tex, lg and su after NETLIST_REGIONID_SW_CTX_LOAD writes during gr init and golden ctx init for it to take effect. For gr sw method handling, don't update the tex rd coalesce on interrupt with offset *_SET_RD_COALESCE as we want to keep rd coalescing disabled. Bug 3881919 Change-Id: Ie7e6616d48f84547ce3380bfa395910b7995c05b Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2857141 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>