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Most of the Orin chip specific code is compiled out of safety build with CONFIG_NVGPU_NON_FUSA and CONFIG_NVGPU_HAL_NON_FUSA. Remove the config protection from Orin/GA10B specific code. Currently all code is enabled. Code not required in safety will be compiled out later in separate activity. Other noteworthy changes in this patch related to safety build: - In ga10b_ce_request_idle(), add a log print to dump num_pce so that compiler does not complain about unused variable num_pce. - In ga10b_fifo_ctxsw_timeout_isr(), protect variables active_eng_id and recover under CONFIG_NVGPU_KERNEL_MODE_SUBMIT to fix compilation errors of unused variables. - Compile out HAL gops.pbdma.force_ce_split() from safety since this HAL is GA100 specific and not required for GA10B. - Compile out gr_ga100_process_context_buffer_priv_segment() with CONFIG_NVGPU_DEBUGGER. - Compile out VAB support with CONFIG_NVGPU_HAL_NON_FUSA. - In ga10b_gr_intr_handle_sw_method(), protect left_shift_by_2 variable with appropriate configs to fix unused variable compilation error. - In ga10b_intr_isr_stall_host2soc_3(), compile ELPG function calls with CONFIG_NVGPU_POWER_PG. - In ga10b_pmu_handle_swgen1_irq(), move whole function body under CONFIG_NVGPU_FALCON_DEBUG to fix unused variable compilation errors. - Add below TU104 specific files in safety build since some of the code in those files is required for GA10B. Unnecessary code will be compiled out later on. hal/gr/init/gr_init_tu104.c hal/class/class_tu104.c hal/mc/mc_tu104.c hal/fifo/usermode_tu104.c hal/gr/falcon/gr_falcon_tu104.c - Compile out GA10B specific debugger/profiler related files from safety build. - Disable CONFIG_NVGPU_FALCON_DEBUG from safety debug build temporarily to work around compilation errors seen with keeping this config enabled. Config will be re-enabled in safety debug build later. Jira NVGPU-7276 Change-Id: I35f2489830ac083d52504ca411c3f1d96e72fc48 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2627048 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
150 lines
3.6 KiB
C
150 lines
3.6 KiB
C
/*
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* NVIDIA GPU HAL interface.
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*
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* Copyright (c) 2014-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/gk20a.h>
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#include <nvgpu/log.h>
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#include <nvgpu/hal_init.h>
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#include <nvgpu/mc.h>
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#include <nvgpu/soc.h>
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#include <nvgpu/static_analysis.h>
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#include "hal_gm20b.h"
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#include "hal_gp10b.h"
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#include "hal_gv11b.h"
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#include "hal_ga10b.h"
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#ifdef CONFIG_NVGPU_DGPU
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#include "hal_tu104.h"
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#include "hal_ga100.h"
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#endif
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#if defined(CONFIG_NVGPU_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
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#include <nvgpu_next_hal_init.h>
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#endif
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#include "hal/mc/mc_gm20b.h"
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int nvgpu_init_hal(struct gk20a *g)
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{
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int err = 0;
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u32 ver = nvgpu_safe_add_u32(g->params.gpu_arch, g->params.gpu_impl);
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switch (ver) {
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#ifdef CONFIG_NVGPU_HAL_NON_FUSA
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case GK20A_GPUID_GM20B:
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nvgpu_log_info(g, "gm20b detected");
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if (gm20b_init_hal(g) != 0) {
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err = -ENODEV;
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}
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break;
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case GK20A_GPUID_GM20B_B:
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nvgpu_log_info(g, "gm20b detected");
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if (gm20b_init_hal(g) != 0) {
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err = -ENODEV;
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}
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break;
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case NVGPU_GPUID_GP10B:
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if (gp10b_init_hal(g) != 0) {
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err = -ENODEV;
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}
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break;
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#endif
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case NVGPU_GPUID_GA10B:
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if (ga10b_init_hal(g) != 0) {
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err = -ENODEV;
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}
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break;
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case NVGPU_GPUID_GV11B:
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if (gv11b_init_hal(g) != 0) {
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err = -ENODEV;
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}
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break;
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#if defined(CONFIG_NVGPU_DGPU) && defined(CONFIG_NVGPU_HAL_NON_FUSA)
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case NVGPU_GPUID_TU104:
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if (tu104_init_hal(g) != 0) {
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err = -ENODEV;
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}
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break;
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#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_DGPU)
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case NVGPU_GPUID_GA100:
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if (ga100_init_hal(g) != 0) {
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err = -ENODEV;
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}
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break;
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#endif
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#endif
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default:
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#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
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if (nvgpu_next_init_hal(g) != 0)
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#endif /* CONFIG_NVGPU_NEXT */
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{
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nvgpu_err(g, "no support for %x", ver);
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err = -ENODEV;
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}
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break;
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}
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return err;
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}
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int nvgpu_detect_chip(struct gk20a *g)
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{
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struct nvgpu_gpu_params *p = &g->params;
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u32 boot_0;
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int err;
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if (p->gpu_arch != 0U) {
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return 0;
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}
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boot_0 = gm20b_get_chip_details(g, &p->gpu_arch,
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&p->gpu_impl, &p->gpu_rev);
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if (boot_0 == U32_MAX) {
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nvgpu_err(g, "get_chip_details failure!");
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return -ENODEV;
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}
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if (nvgpu_safe_add_u32(p->gpu_arch, p->gpu_impl) ==
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(u32)NVGPU_GPUID_GV11B) {
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/* overwrite gpu revison for A02 */
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if (!nvgpu_is_soc_t194_a01(g)) {
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p->gpu_rev = 0xa2;
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}
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}
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nvgpu_log_info(g, "arch: %x, impl: %x, rev: %x\n",
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g->params.gpu_arch,
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g->params.gpu_impl,
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g->params.gpu_rev);
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err = nvgpu_init_hal(g);
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if (err != 0) {
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nvgpu_err(g, "nvgpu_init_hal failure!");
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return err;
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}
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return 0;
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}
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