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At present, for each resume cycle the driver sends the "nvgpu_cbc_op_clear" command to L2 cache controller, this causes the contents of the compression bit backing store to be cleared, and results in corrupting the metadata for all the compressible surfaces already allocated. Fix this by updating cbc.init function to be aware of resume state and not clear the compression bit backing store, instead issue "nvgpu_cbc_op_invalide" command, this should leave the backing store in a consistent state across suspend/resume cycles. The updated cbc.init HAL for gv11b is reusable acrosss multiple chips, hence remove unnecessary chip specific cbc.init HALs. Bug 3483688 Change-Id: I2de848a083436bc085ee98e438874214cb61261f Signed-off-by: Antony Clince Alex <aalex@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2660075 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>