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b96a6506d0
Move all files under perf/* to pmu_perf/* since pmu_perf is logically appropriate name for PMU's perf unit Rename perf.c to pmu_perf.c Also rename the HAL from gops.perf to gops.pmu_perf Jira NVGPU-1102 Change-Id: I79e73b8b102ddf6b49783c2f38d861cd43b0b4c6 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1819301 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
86 lines
3.7 KiB
C
86 lines
3.7 KiB
C
/*
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* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_PERF_H
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#define NVGPU_PERF_H
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#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
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#include "vfe_equ.h"
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#include "vfe_var.h"
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#include "pstate/pstate.h"
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#include "volt/volt.h"
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#include "lpwr/lpwr.h"
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#include "boardobj/boardobjgrp_e255.h"
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#define CTRL_PERF_VFE_VAR_TYPE_INVALID 0x00
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#define CTRL_PERF_VFE_VAR_TYPE_DERIVED 0x01
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#define CTRL_PERF_VFE_VAR_TYPE_DERIVED_PRODUCT 0x02
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#define CTRL_PERF_VFE_VAR_TYPE_DERIVED_SUM 0x03
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#define CTRL_PERF_VFE_VAR_TYPE_SINGLE 0x04
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#define CTRL_PERF_VFE_VAR_TYPE_SINGLE_FREQUENCY 0x05
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#define CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED 0x06
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#define CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_FUSE 0x07
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#define CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_TEMP 0x08
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#define CTRL_PERF_VFE_VAR_TYPE_SINGLE_VOLTAGE 0x09
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#define CTRL_PERF_VFE_VAR_SINGLE_OVERRIDE_TYPE_NONE 0x00
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#define CTRL_PERF_VFE_VAR_SINGLE_OVERRIDE_TYPE_VALUE 0x01
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#define CTRL_PERF_VFE_VAR_SINGLE_OVERRIDE_TYPE_OFFSET 0x02
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#define CTRL_PERF_VFE_VAR_SINGLE_OVERRIDE_TYPE_SCALE 0x03
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#define CTRL_PERF_VFE_EQU_TYPE_INVALID 0x00
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#define CTRL_PERF_VFE_EQU_TYPE_COMPARE 0x01
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#define CTRL_PERF_VFE_EQU_TYPE_MINMAX 0x02
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#define CTRL_PERF_VFE_EQU_TYPE_QUADRATIC 0x03
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#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_UNITLESS 0x00
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#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_FREQ_MHZ 0x01
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#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_VOLT_UV 0x02
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#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_VF_GAIN 0x03
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#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_VOLT_DELTA_UV 0x04
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#define CTRL_PERF_VFE_EQU_QUADRATIC_COEFF_COUNT 0x03
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#define CTRL_PERF_VFE_EQU_COMPARE_FUNCTION_EQUAL 0x00
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#define CTRL_PERF_VFE_EQU_COMPARE_FUNCTION_GREATER_EQ 0x01
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#define CTRL_PERF_VFE_EQU_COMPARE_FUNCTION_GREATER 0x02
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struct gk20a;
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struct nvgpu_vfe_invalidate {
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bool state_change;
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struct nvgpu_cond wq;
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struct nvgpu_thread state_task;
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};
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struct perf_pmupstate {
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struct vfe_vars vfe_varobjs;
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struct vfe_equs vfe_equobjs;
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struct pstates pstatesobjs;
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struct obj_volt volt;
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struct obj_lwpr lpwr;
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struct nvgpu_vfe_invalidate vfe_init;
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};
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u32 perf_pmu_vfe_load(struct gk20a *g);
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#endif /* NVGPU_PERF_H */
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