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Currently, the registeration with error injection utility is done only for GA10b using HAL. But HALs are not initialized during the probe stage when we try to register the error injection utility. So, the callback registration does not happen HAL is set to NULL. Move the callback registration from probe to poweron stage when HAL is initialized. Update the nvgpu_cic_mon_init_lut() API name as it is no longer doing only LUT initialization. Bug 3828050 Change-Id: Ide718029e9317124749b4a51c423ae70dc8227c8 Signed-off-by: Tejal Kudav <tkudav@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2790269 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
228 lines
5.1 KiB
C
228 lines
5.1 KiB
C
/*
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* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <stdlib.h>
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#include <sys/types.h>
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#include <unistd.h>
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#include <unit/io.h>
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#include <unit/unit.h>
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#include <nvgpu/channel.h>
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#include <nvgpu/tsg.h>
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#include <nvgpu/mm.h>
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#include <nvgpu/fifo/userd.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/device.h>
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#include <nvgpu/cic_mon.h>
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#include <nvgpu/cic_rm.h>
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#include <nvgpu/posix/io.h>
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#include <nvgpu/hw/gv11b/hw_gr_gv11b.h>
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#include "hal/init/hal_gv11b.h"
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#include "nvgpu-fifo-common.h"
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#include "nvgpu-fifo-gv11b.h"
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static struct unit_module *global_m;
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/*
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* If taken, some branches are final, e.g. the function exits.
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* There is no need to test subsequent branches combinations,
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* if one final branch is taken.
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*
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* We want to skip the subtest if:
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* - it has at least one final branch
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* - it is supposed to test some branches after this final branch
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*
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* Parameters:
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* branches bitmask of branches to be taken for one subtest
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* final_branches bitmask of final branches
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*
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* Note: the assumption is that branches are numbered in their
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* order of appearance in the function to be tested.
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*/
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bool test_fifo_subtest_pruned(u32 branches, u32 final_branches)
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{
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u32 match = branches & final_branches;
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int bit;
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if (match == 0U) {
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return false;
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}
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bit = nvgpu_ffs(match) - 1;
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return (branches > BIT(bit));
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}
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static int test_fifo_flags_strn(char *dst, size_t size,
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const char *labels[], u32 flags)
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{
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int i;
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char *p = dst;
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int len;
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for (i = 0; i < 32; i++) {
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if (flags & BIT(i)) {
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len = snprintf(p, size, "%s ", labels[i]);
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size -= len;
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p += len;
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}
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}
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return (p - dst);
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}
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/* not MT-safe */
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char *test_fifo_flags_str(u32 flags, const char *labels[])
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{
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static char buf[256];
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memset(buf, 0, sizeof(buf));
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test_fifo_flags_strn(buf, sizeof(buf), labels, flags);
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return buf;
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}
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u32 test_fifo_get_log2(u32 num)
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{
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u32 res = 0;
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if (num == 0) {
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return 0;
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}
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while (num > 0) {
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res++;
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num >>= 1;
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}
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return res - 1U;
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}
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static u32 stub_gv11b_gr_init_get_no_of_sm(struct gk20a *g)
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{
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return 8;
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}
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static void stub_gr_falcon_dump_stats(struct gk20a *g)
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{
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}
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#ifdef CONFIG_NVGPU_USERD
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static int stub_userd_setup_sw(struct gk20a *g)
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{
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int err = nvgpu_userd_init_slabs(g);
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if (err != 0) {
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unit_err(global_m, "failed to init userd support");
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return err;
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}
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return 0;
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}
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#endif
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int test_fifo_init_support(struct unit_module *m, struct gk20a *g, void *args)
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{
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int err;
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err = test_fifo_setup_gv11b_reg_space(m, g);
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if (err != 0) {
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goto fail;
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}
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if (nvgpu_posix_io_add_reg_space(g,
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gr_fecs_feature_override_ecc_r(), 0x4) != 0) {
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unit_err(m, "Add reg space failed!\n");
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return UNIT_FAIL;
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}
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if (nvgpu_posix_io_add_reg_space(g,
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gr_fecs_feature_override_ecc_1_r(), 0x4) != 0) {
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unit_err(m, "Add reg space failed!\n");
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return UNIT_FAIL;
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}
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gv11b_init_hal(g);
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g->ops.gr.init.get_no_of_sm = stub_gv11b_gr_init_get_no_of_sm;
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g->ops.gr.falcon.dump_stats = stub_gr_falcon_dump_stats;
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global_m = m;
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#ifdef CONFIG_NVGPU_USERD
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/*
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* Regular USERD init requires bar1.vm to be initialized
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* Use a stub in unit tests, since it will be disabled in
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* safety build anyway.
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*/
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g->ops.userd.setup_sw = stub_userd_setup_sw;
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#endif
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g->ops.ecc.ecc_init_support(g);
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/* PD cache must be initialized prior to mm init */
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err = nvgpu_pd_cache_init(g);
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g->ops.mm.init_mm_support(g);
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nvgpu_device_init(g);
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err = nvgpu_fifo_init_support(g);
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/* Do not allocate from vidmem */
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nvgpu_set_enabled(g, NVGPU_MM_UNIFIED_MEMORY, true);
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err = nvgpu_cic_mon_setup(g);
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if (err != 0) {
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unit_err(m, "CIC init failed!\n");
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return UNIT_FAIL;
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}
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err = nvgpu_cic_mon_init(g);
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if (err != 0) {
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unit_return_fail(m, "CIC mon init failed\n");
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}
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err = nvgpu_cic_rm_setup(g);
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if (err != 0) {
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unit_return_fail(m, "CIC-rm init failed\n");
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}
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err = nvgpu_cic_rm_init_vars(g);
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if (err != 0) {
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unit_return_fail(m, "CIC-rm vars init failed\n");
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}
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return UNIT_SUCCESS;
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fail:
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return UNIT_FAIL;
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}
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int test_fifo_remove_support(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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if (g->fifo.remove_support) {
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g->fifo.remove_support(&g->fifo);
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}
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return UNIT_SUCCESS;
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}
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