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435892a784b51ebe9bb8a0844ae4f83607726c8e
linux-nvgpu/drivers/gpu/nvgpu/gv11b
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matthewb 4b10960329 gpu: nvgpu: HAL-ify pmm type broadcast values 
The PMM type-specific broadcast->unicast expansion calculation
was using incorrect values.  This caused the invalid register
accesses to be generated.

This change HAL-ifies the values, so that the expansion will be
performed correctly.

Bug 200454109

Change-Id: I96c15de27b5e16e4db2e788fd98e6bf7d6e7d564
Signed-off-by: Matthew Braun <matthewb@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1919476
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-10-12 17:35:11 +05:30
..
acr_gv11b.c
gpu: nvgpu: ACR code refactor
2018-09-24 08:11:49 -07:00
acr_gv11b.h
gpu: nvgpu: ACR code refactor
2018-09-24 08:11:49 -07:00
ce_gv11b.c
gpu: nvgpu: change location of gk20a.h#include <nvgpu/gk20a.h>
2018-09-14 15:35:12 -07:00
ce_gv11b.h
nvgpu: gv11b: MISRA Rule 21.2 header guard fixes
2018-09-17 23:39:59 -07:00
ecc_gv11b.c
gpu: nvgpu: change location of gk20a.h#include <nvgpu/gk20a.h>
2018-09-14 15:35:12 -07:00
ecc_gv11b.h
nvgpu: gv11b: MISRA Rule 21.2 header guard fixes
2018-09-17 23:39:59 -07:00
fifo_gv11b.c
gpu: nvgpu: dump TSG id in channel status
2018-10-12 17:35:10 +05:30
fifo_gv11b.h
gpu: nvgpu: gv11b: issue runlist preempt during teardown
2018-07-19 13:55:32 -07:00
gr_ctx_gv11b.c
gpu: nvgpu: change location of gk20a.h#include <nvgpu/gk20a.h>
2018-09-14 15:35:12 -07:00
gr_ctx_gv11b.h
nvgpu: gv11b: MISRA Rule 21.2 header guard fixes
2018-09-17 23:39:59 -07:00
gr_gv11b.c
gpu: nvgpu: HAL-ify pmm type broadcast values
2018-10-12 17:35:11 +05:30
gr_gv11b.h
gpu: nvgpu: Add gv11b_gr_clear_sm_error_state
2018-10-12 17:35:07 +05:30
gr_pri_gv11b.h
gpu: nvgpu: HAL-ify pmm type broadcast values
2018-10-12 17:35:11 +05:30
gv11b.c
gpu: nvgpu: change location of gk20a.h#include <nvgpu/gk20a.h>
2018-09-14 15:35:12 -07:00
gv11b.h
gpu: nvgpu: change location of gk20a.h#include <nvgpu/gk20a.h>
2018-09-14 15:35:12 -07:00
hal_gv11b.c
gpu: nvgpu: HAL-ify pmm type broadcast values
2018-10-12 17:35:11 +05:30
hal_gv11b.h
gpu: nvgpu: fix return type of *get_litter_value()
2018-09-26 16:44:59 -07:00
mm_gv11b.c
gpu: nvgpu: change location of gk20a.h#include <nvgpu/gk20a.h>
2018-09-14 15:35:12 -07:00
mm_gv11b.h
gpu: nvgpu: disable fb fault buffer in prepare poweroff
2018-07-19 22:14:58 -07:00
pmu_gv11b.c
gpu: nvgpu: gv11b: Load FECS via DMA controller.
2018-10-12 17:35:09 +05:30
pmu_gv11b.h
nvgpu: gv11b: MISRA Rule 21.2 header guard fixes
2018-09-17 23:39:59 -07:00
regops_gv11b.c
gpu: nvgpu: change location of gk20a.h#include <nvgpu/gk20a.h>
2018-09-14 15:35:12 -07:00
regops_gv11b.h
nvgpu: gv11b: MISRA Rule 21.2 header guard fixes
2018-09-17 23:39:59 -07:00
subctx_gv11b.c
gpu: nvgpu: change location of gk20a.h#include <nvgpu/gk20a.h>
2018-09-14 15:35:12 -07:00
subctx_gv11b.h
nvgpu: gv11b: MISRA Rule 21.2 header guard fixes
2018-09-17 23:39:59 -07:00