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1c40d09c4c
bug 1648908 This commit adds support for FECS ctxsw tracing. Code is compiled conditionnaly under CONFIG_GK20_CTXSW_TRACE. This feature requires an updated FECS ucode that writes one record to a ring buffer on each context switch. On RM/Kernel side, the GPU driver reads records from the master ring buffer and generates trace entries into a user-facing VM ring buffer. For each record in the master ring buffer, RM/Kernel has to retrieve the vmid+pid of the user process that submitted related work. Features currently implemented: - master ring buffer allocation - debugfs to dump master ring buffer - FECS record per context switch (with both current and new contexts) - dedicated device for ctxsw tracing (access to VM ring buffer) - SOF generation (and access to PTIMER) - VM ring buffer allocation, and reconfiguration - enable/disable tracing at user level - event-based trace filtering - context_ptr to vmid+pid mapping - read system call for ctxsw dev - mmap system call for ctxsw dev (direct access to VM ring buffer) - poll system call for ctxsw dev - save/restore register on ELPG/CG6 - separate user ring from FECS ring handling Features requiring ucode changes: - enable/disable tracing at FECS level - actual busy time on engine (bug 1642354) - master ring buffer threshold interrupt (P1) - API for GPU to CPU timestamp conversion (P1) - vmid/pid/uid based filtering (P1) Change-Id: I8e39c648221ee0fa09d5df8524b03dca83fe24f3 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1022737 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
94 lines
2.5 KiB
Plaintext
94 lines
2.5 KiB
Plaintext
config GK20A
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tristate "Nvidia GK20A GPU support"
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default y
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help
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Choose this option if you have an SoC with integrated
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Nvidia GPU IP.
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config GK20A_DEFAULT_TIMEOUT
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depends on GK20A
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int "Default timeout for submits"
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default 3000
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help
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Default timeout for jobs in milliseconds. Set to zero for no timeout.
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config GK20A_PMU
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bool "Support GK20A PMU"
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depends on GK20A
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default n
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help
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Say Y here to enable GK20A PMU features.
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choice
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depends on GK20A
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prompt "Enable GK20A frequency scaling"
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default GK20A_PERFMON
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optional
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help
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Select this entry to enable gk20a scaling
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config GK20A_PERFMON
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bool "Use Perfmon"
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help
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Select this to enable built-in perfmon scaling.
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The built-in scaling option uses simplistic
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scaling mechanism (if busy, increase frequency and
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decrease frequency if idle).
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config GK20A_DEVFREQ
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depends on TEGRA_CLK_FRAMEWORK || COMMON_CLK
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bool "Use Devfreq"
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help
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Select this to use devfreq based scaling.
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Devfreq is a common framework that allows using
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variety of different governors and changing
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between governors on the fly. By default, no
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governor is selected.
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endchoice
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config GK20A_CYCLE_STATS
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bool "Support GK20A GPU CYCLE STATS"
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depends on GK20A
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default y
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help
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Say Y here to enable the cycle stats debugging features.
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config GK20A_CTXSW_TRACE
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bool "Support GK20A Context Switch tracing"
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depends on GK20A
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default n
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help
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Enable support for the GK20A Context Switch Tracing. In this mode,
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FECS collects timestamps for contexts loaded on GR engine. This
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allows tracking context switches on GR engine, as well as
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identifying processes that submitted work.
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config TEGRA_GK20A
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bool "Enable the GK20A GPU on Tegra"
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depends on TEGRA_GRHOST || TEGRA_HOST1X
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depends on GK20A
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default y
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help
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Enable support for the GK20A graphics engine on Tegra
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by adding a Tegra platfrom interface to the GK20A driver.
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The Tegra platform interface requires TEGRA_GRHOST (host1x).
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config TEGRA_ACR
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bool "Enable HS bin support on GM20B GPU on Tegra"
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depends on GK20A_PMU
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default n
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help
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Enable Support for Loading High Secure binary, and using
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Write Protected Regions (WPR) for storing ucodes, and bootstrap
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PMU, FECS and GPCCS in Low Secure mode.
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config TEGRA_USE_NA_GPCPLL
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bool "Enable noise aware mode of GM20B GPCPLL on Tegra"
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depends on TEGRA_CLK_FRAMEWORK
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default n
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help
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Enable noise aware (NA) mode of GM20b GPCPLL. In this mode PLL output
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frequency is automatically adjusted when GM20b voltage is fluctuating
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because of transient PMIC or power distribution tree noise.
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