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1c40d09c4c
bug 1648908 This commit adds support for FECS ctxsw tracing. Code is compiled conditionnaly under CONFIG_GK20_CTXSW_TRACE. This feature requires an updated FECS ucode that writes one record to a ring buffer on each context switch. On RM/Kernel side, the GPU driver reads records from the master ring buffer and generates trace entries into a user-facing VM ring buffer. For each record in the master ring buffer, RM/Kernel has to retrieve the vmid+pid of the user process that submitted related work. Features currently implemented: - master ring buffer allocation - debugfs to dump master ring buffer - FECS record per context switch (with both current and new contexts) - dedicated device for ctxsw tracing (access to VM ring buffer) - SOF generation (and access to PTIMER) - VM ring buffer allocation, and reconfiguration - enable/disable tracing at user level - event-based trace filtering - context_ptr to vmid+pid mapping - read system call for ctxsw dev - mmap system call for ctxsw dev (direct access to VM ring buffer) - poll system call for ctxsw dev - save/restore register on ELPG/CG6 - separate user ring from FECS ring handling Features requiring ucode changes: - enable/disable tracing at FECS level - actual busy time on engine (bug 1642354) - master ring buffer threshold interrupt (P1) - API for GPU to CPU timestamp conversion (P1) - vmid/pid/uid based filtering (P1) Change-Id: I8e39c648221ee0fa09d5df8524b03dca83fe24f3 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1022737 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
101 lines
2.3 KiB
Makefile
101 lines
2.3 KiB
Makefile
GCOV_PROFILE := y
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ccflags-y += -Idrivers/gpu/nvgpu
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ccflags-y += -Idrivers/video/tegra/host
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ccflags-y += -Idrivers/devfreq
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ccflags-y += -Wno-multichar
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ccflags-y += -Werror
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ccflags-y += -Wno-error=cpp
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ifeq ($(CONFIG_ARCH_TEGRA_18x_SOC),y)
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ccflags-y += -I$(srctree)/../kernel-t18x/drivers/gpu/nvgpu
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ccflags-y += -I$(srctree)/../kernel-t18x/include
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ccflags-y += -I$(srctree)/../kernel-t18x/include/uapi
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endif
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obj-$(CONFIG_GK20A) := nvgpu.o
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nvgpu-y := \
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gk20a/gk20a.o \
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gk20a/as_gk20a.o \
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gk20a/ctrl_gk20a.o \
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gk20a/ce2_gk20a.o \
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gk20a/fifo_gk20a.o \
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gk20a/channel_gk20a.o \
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gk20a/channel_sync_gk20a.o \
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gk20a/debug_gk20a.o \
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gk20a/dbg_gpu_gk20a.o \
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gk20a/regops_gk20a.o \
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gk20a/gr_gk20a.o \
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gk20a/kind_gk20a.o \
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gk20a/mm_gk20a.o \
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gk20a/pmu_gk20a.o \
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gk20a/priv_ring_gk20a.o \
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gk20a/semaphore_gk20a.o \
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gk20a/fence_gk20a.o \
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gk20a/therm_gk20a.o \
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gk20a/gr_ctx_gk20a_sim.o \
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gk20a/gr_ctx_gk20a.o \
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gk20a/gk20a_gating_reglist.o \
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gk20a/gk20a_sysfs.o \
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gk20a/ltc_gk20a.o \
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gk20a/fb_gk20a.o \
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gk20a/hal.o \
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gk20a/hal_gk20a.o \
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gk20a/gk20a_allocator.o \
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gk20a/cde_gk20a.o \
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gk20a/platform_gk20a_generic.o \
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gk20a/tsg_gk20a.o \
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gk20a/ctxsw_trace_gk20a.o \
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gk20a/fecs_trace_gk20a.o \
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gk20a/mc_gk20a.o \
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gm20b/hal_gm20b.o \
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gm20b/ltc_gm20b.o \
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gm20b/ce2_gm20b.o \
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gm20b/gr_gm20b.o \
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gm20b/gr_gm20b.o \
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gm20b/fb_gm20b.o \
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gm20b/fifo_gm20b.o \
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gm20b/gr_ctx_gm20b.o \
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gm20b/gm20b_gating_reglist.o \
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gm20b/acr_gm20b.o \
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gm20b/pmu_gm20b.o \
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gm20b/mm_gm20b.o \
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gm20b/regops_gm20b.o \
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gm20b/mc_gm20b.o \
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gm20b/debug_gm20b.o \
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gm20b/cde_gm20b.o \
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gm20b/therm_gm20b.o
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nvgpu-$(CONFIG_TEGRA_GK20A) += gk20a/platform_gk20a_tegra.o
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nvgpu-$(CONFIG_SYNC) += gk20a/sync_gk20a.o
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nvgpu-$(CONFIG_TEGRA_GR_VIRTUALIZATION) += \
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gk20a/platform_vgpu_tegra.o \
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vgpu/ltc_vgpu.o \
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vgpu/gr_vgpu.o \
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vgpu/fifo_vgpu.o \
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vgpu/ce2_vgpu.o \
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vgpu/mm_vgpu.o \
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vgpu/debug_vgpu.o \
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vgpu/vgpu.o \
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vgpu/dbg_vgpu.o \
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vgpu/fecs_trace_vgpu.o \
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vgpu/gk20a/vgpu_hal_gk20a.o \
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vgpu/gk20a/vgpu_gr_gk20a.o \
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vgpu/gm20b/vgpu_hal_gm20b.o \
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vgpu/gm20b/vgpu_gr_gm20b.o
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nvgpu-$(CONFIG_TEGRA_CLK_FRAMEWORK) += \
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gm20b/clk_gm20b.o \
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gk20a/clk_gk20a.o
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nvgpu-$(CONFIG_GK20A_DEVFREQ) += \
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gk20a/gk20a_scale.o
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nvgpu-$(CONFIG_GK20A_CYCLE_STATS) += \
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gk20a/css_gr_gk20a.o
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ifeq ($(CONFIG_ARCH_TEGRA_18x_SOC),y)
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include ../kernel-t18x/drivers/gpu/nvgpu/Makefile
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endif
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