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Add BVEC tests for following common.ltc unit API: gops_ltc_intr.isr Add unit test for boundary value check for ltc parameter of the LTC isr. JIRA NVGPU-6398 Change-Id: I0e075a3244d969d11faa4fd99e7e364218da6e30 Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2549802 (cherry picked from commit 3133a7173b0853a699e4ebf2fc50e866e3ac6211) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2623636 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Shashank Singh <shashsingh@nvidia.com> Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> GVS: Gerrit_Virtual_Submit
389 lines
13 KiB
C
389 lines
13 KiB
C
/*
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* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef UNIT_NVGPU_LTC_H
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#define UNIT_NVGPU_LTC_H
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#include <nvgpu/types.h>
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/** @addtogroup SWUTS-ltc
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* @{
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*
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* Software Unit Test Specification for ltc
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*/
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/**
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* Test specification for: test_ltc_init_support
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*
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* Description: The ltc unit gets initialized
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*
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* Test Type: Feature, Error guessing
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*
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* Targets: gops_ltc.init_ltc_support, nvgpu_init_ltc_support
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*
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* Input: None
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*
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* Steps:
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* - Initialize the test environment for ltc unit testing:
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* - Setup gv11b register spaces for hals to read emulated values.
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* - Register read/write IO callbacks.
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* - Setup init parameters to setup gv11b arch.
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* - Initialize hal to setup the hal functions.
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* - Call gops_ltc.init_ltc_support to initialize ltc unit.
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* - Call gops_ltc.init_ltc_support a second time to get branch coverage for
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* already initialzed ltc. Call should not fail.
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* - Call gops_ltc.init_ltc_support with the init_fs_state HAL set to zero. Call
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* should not fail.
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* - Call gops_ltc.init_ltc_support with fault injection enabled for
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* nvgpu_kzalloc. Call should fail, but not crash.
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*
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* Output: Returns PASS if the steps above were executed successfully. FAIL
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* otherwise.
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*/
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int test_ltc_init_support(struct unit_module *m,
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struct gk20a *g, void *args);
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/**
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* Test specification for: test_ltc_ecc_init_free
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*
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* Description: Validate ltc unit initialization of ecc counters.
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*
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* Test Type: Feature, Error guessing
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*
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* Targets: nvgpu_ecc_counter_init_per_lts, nvgpu_ltc_ecc_free,
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* gops_ltc.ecc_init, gv11b_lts_ecc_init
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*
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* Input: test_ltc_init_support must have completed successfully.
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*
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* Steps:
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* - Call nvgpu_gr_alloc() since parts of the gr structure are required for
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* the failure paths.
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* - Save the current ecc count pointers from the gk20a struct and set the gk20a
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* pointers to NULL.
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* - Do following to check fault while allocating ECC counters for SEC, DED, TSTG and DSTG BE
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* - Re-init ecc support.
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* - Setup kmem fault injection to trigger fault on allocation for particular ECC counter.
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* - Call ltc ecc counter init and verify error is returned.
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* - Re-init ecc support.
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* - Disable kmem fault injection.
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* - Call ltc ecc counter init and verify no error is returned.
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* - Call ltc ecc counter free.
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* - Restore gk20a ltc ecc counter pointers to previous values.
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* - Free gr structures.
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*
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* Output: Returns PASS if the steps above were executed successfully. FAIL
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* otherwise.
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*/
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int test_ltc_ecc_init_free(struct unit_module *m, struct gk20a *g, void *args);
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/**
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* Test specification for: test_ltc_functionality_tests
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*
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* Description: This test test ltc sync enabled and queries data
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* related to different ltc data.
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* Checks whether valid data is returned or not.
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_ltc_get_ltc_count,
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* nvgpu_ltc_get_slices_per_ltc, nvgpu_ltc_get_cacheline_size
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*
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* Input: None
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*
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* Steps:
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* - Call nvgpu_ltc_get_ltc_count
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* - Call nvgpu_ltc_get_slices_per_ltc
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* - Call nvgpu_ltc_get_cacheline_size
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* Checked called functions returns correct data.
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*
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* Output: Returns PASS if returned data is valid. FAIL otherwise.
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*/
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int test_ltc_functionality_tests(struct unit_module *m,
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struct gk20a *g, void *args);
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/**
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* Test specification for: test_ltc_negative_tests
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*
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* Description: This test covers negative paths in ltc unit.
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*
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* Test Type: Feature, Error guessing
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*
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* Targets: gops_ltc.ltc_remove_support,
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* gops_ltc.init_ltc_support, nvgpu_init_ltc_support,
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* nvgpu_ltc_remove_support
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*
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* Input: None
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*
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* Steps:
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* - Call gops_ltc.ltc_remove_support twice
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* - Call gops_ltc.init_ltc_support
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*
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* Output: Returns PASS if expected result is met, FAIL otherwise.
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*/
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int test_ltc_negative_tests(struct unit_module *m,
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struct gk20a *g, void *args);
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/**
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* Test specification for: test_ltc_remove_support
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*
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* Description: The ltc unit removes all populated ltc info.
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*
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* Test Type: Feature
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*
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* Targets: gops_ltc.ltc_remove_support, nvgpu_ltc_remove_support
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*
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* Input: None
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*
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* Steps:
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* - Call gops_ltc.ltc_remove_support
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*
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* Output: Returns PASS
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*/
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int test_ltc_remove_support(struct unit_module *m,
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struct gk20a *g, void *args);
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/**
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* Test specification for: test_ltc_intr
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*
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* Description: Validate ltc interrupt handler (isr). The ltc isr is responsible
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* for reporting errors determind from the ltc status registers.
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*
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* Test Type: Feature
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*
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* Targets: gops_ltc_intr.isr, gv11b_ltc_intr_isr,
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* gp10b_ltc_intr_handle_lts_interrupts
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*
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* Input: test_ltc_init_support must have completed successfully.
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*
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* Steps:
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* - Allocate ECC stat counter objects used by handler (ecc_sec_count,
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* ecc_ded_count, tstg_ecc_parity_count, dstg_be_ecc_parity_count).
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* - Test LTC isr with no interrupts pending.
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* - Test LTC isr with corrected interrupt. Expect BUG.
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* - Test with uncorrected bits in the first LTC instances.
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* - Set the uncorrected counter overflow bits in the first
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* ecc_status register (NV_PLTCG_LTC0_LTS0_L2_CACHE_ECC_STATUS).
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* - Set the interrupt pending bit in the first LTC interrupt register
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* (NV_PLTCG_LTC0_LTS0_INTR).
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* - Call the LTC isr.
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* - Test with uncorrected bits in the second LTC instance.
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* - Set the uncorrected counter overflow bits in the second
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* ecc_status register.
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* - Set the interrupt pending bit in the second LTC interrupt register.
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* - Call the LTC isr.
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* - Test with uncorrected error counts but without err bits (for
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* branch coverage).
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* - Clear the uncorrected counter overflow bits in the ecc_status register.
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* - Write values to the uncorrected count registers.
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* - Set the interrupt pending bit in the LTC interrupt register.
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* - Call the LTC isr.
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* - Test handling of rstg error.
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* - Set the rstg uncorrected counter error bits in the ecc_status register.
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* - Set the interrupt pending bit in the LTC interrupt register.
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* - Call the LTC isr.
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* - Expect BUG.
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* - Test handling of tstg errors.
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* - Set the tstg uncorrected counter error bits in the ecc_status register.
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* - Set the interrupt pending bit in the LTC interrupt register.
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* - Call the LTC isr.
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* - Test handling of dstg errors.
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* - Set the dstg uncorrected counter error bits in the ecc_status register.
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* - Set the interrupt pending bit in the LTC interrupt register.
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* - Call the LTC isr.
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* - Test handling of sec error when the l2 flush API succeeds
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* - Override the MM l2_flush HAL to return success.
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* - Set the sec pending error bits in the ecc_status register.
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* - Set the interrupt pending bit in the LTC interrupt register.
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* - Call the LTC isr.
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* - Test handling of ded error.
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* - Set the ded pending error bits in the ecc_status register.
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* - Set the interrupt pending bit in the LTC interrupt register.
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* - Call the LTC isr.
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* - Test handling of sec error when the l2 flush API fails (for
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* branch coverage).
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* - Set the sec pending error bits in the ecc_status register.
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* - Set the interrupt pending bit in the LTC interrupt register.
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* - Call the LTC isr.
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*
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* Output: Returns PASS unless counter initialization fails or an except occurs
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* in interrupt handler.
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*/
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int test_ltc_intr(struct unit_module *m, struct gk20a *g, void *args);
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/**
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* Test specification for: test_ltc_intr_bvec
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*
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* Description: Validate ltc interrupt handler (isr) for valid and invalid LTC values.
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*
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* Test Type: Boundary Value
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*
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* Targets: gops_ltc_intr.isr, gv11b_ltc_intr_isr
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*
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* Input: test_ltc_init_support must have completed successfully.
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*
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* Equivalence classes:
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* Variable: ltc
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* - Valid: {0, NUM_LTC - 1}
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* - Invalid: {NUM_LTC, U32_MAX}
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*
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* Steps:
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* - Allocate ECC stat counter objects used by handler
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* (dstg_be_ecc_parity_count).
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* - Verify that isr for valid ltc (lts 0) is handled correctly.
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* - Set the corrected counter in the ecc_uncorrected_err_count_r
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* register for valid LTCs for LTS0.
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* - Set the ecc_uncorrected_m in ltc_intr3 for valid LTCs.
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* - Clear the dstg_be_ecc_parity_count for the valid LTC and LTS0.
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* - Call the LTC isr through LTC unit gops.ltc.isr.
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* - Verify that LTC isr is passing.
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* - Verify that the dstg_be_ecc_parity_count is updated by the LTC isr.
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* - Verify that isr for invalid ltc (lts 0) fails.
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* - Call the LTC isr through LTC unit gops.ltc.isr.
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* - Verify that LTC isr is failed.
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*
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* Output: Returns PASS if interrupt handler updates the counters correctly
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* for valid LTCs and fails for invalid LTCs.
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* Returns FAIL otherwise.
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*/
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int test_ltc_intr_bvec(struct unit_module *m, struct gk20a *g, void *args);
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/*
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* Test specification for: test_ltc_intr_configure
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*
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* Description: Validate the ltc interrupt configure API.
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*
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* Test Type: Feature
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*
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* Targets: gops_ltc_intr.configure, gv11b_ltc_intr_configure
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*
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* Input: None
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*
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* Steps:
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* - Call the gops_ltc_intr.configure HAL.
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* - Verify correct setting in LTC intr register (NV_PLTCG_LTCS_LTSS_INTR).
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* - For branch coverage, verify handling when en_illegal_compstat HAL is NULL.
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* - Set en_illegal_compstat HAL to NULL.
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* - Call the gv11b_ltc_intr_configure HAL.
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* - Verify correct setting in LTC intr register.
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*
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* Output: Returns PASS if register is configured correctly. FAIL otherwise.
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*/
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int test_ltc_intr_configure(struct unit_module *m,
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struct gk20a *g, void *args);
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/**
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* Test specification for: test_determine_L2_size_bytes
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*
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* Description: Validate the ltc API to determine L2 size.
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*
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* Test Type: Feature
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*
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* Targets: gops_ltc.determine_L2_size_bytes, gp10b_determine_L2_size_bytes
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*
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* Input: test_ltc_init_support must have completed successfully.
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*
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* Steps:
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* - Set the L2 configuration in the ltc NV_PLTCG_LTC0_LTSS_TSTG_INFO_ register.
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* - Call the gops_ltc.determine_L2_size_bytes HAL.
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* - Verify the correct L2 size is returned.
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*
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* Output: Returns PASS if correct size returned. FAIL otherwise.
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*/
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int test_determine_L2_size_bytes(struct unit_module *m,
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struct gk20a *g, void *args);
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#ifdef CONFIG_NVGPU_NON_FUSA
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/**
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* Test specification for: test_ltc_intr_en_illegal_compstat
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*
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* Description: Validate the inter_en_illegal_compstat API.
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*
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* Test Type: Feature
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*
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* Targets: gops_ltc_intr.en_illegal_compstat, gv11b_ltc_intr_en_illegal_compstat
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*
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* Input: None
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*
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* Steps:
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* - Clear the LTC intr register (NV_PLTCG_LTCS_LTSS_INTR).
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* - Call the gv11b_ltc_intr_en_illegal_compstat HAL requesting enable.
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* - Verify correct setting in LTC intr register.
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* - Call the gv11b_ltc_intr_en_illegal_compstat HAL requesting disable.
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* - Verify correct setting in LTC intr register.
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*
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* Output: Returns PASS if register is configured correctly. FAIL otherwise.
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*/
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int test_ltc_intr_en_illegal_compstat(struct unit_module *m,
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struct gk20a *g, void *args);
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/**
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* Test specification for: test_ltc_set_enabled
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*
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* Description: Validate the ltc API to enable level 2 cache.
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*
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* Test Type: Feature
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*
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* Targets: gops_ltc.set_enabled, gp10b_ltc_set_enabled
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*
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* Input: None
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*
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* Steps:
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* - Clear the NV_PLTCG_LTCS_LTSS_TSTG_SET_MGMT_2 register
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* - Call the gops_ltc.set_enabled HAL requesting enable.
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* - Verify the L2 bypass mode is disabled in NV_PLTCG_LTCS_LTSS_TSTG_SET_MGMT_2.
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* - Clear the NV_PLTCG_LTCS_LTSS_TSTG_SET_MGMT_2 register
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* - Call the gops_ltc.set_enabled HAL requesting disable.
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* - Verify the L2 bypass mode is enabled in NV_PLTCG_LTCS_LTSS_TSTG_SET_MGMT_2.
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*
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* Output: Returns PASS if register is configured correctly. FAIL otherwise.
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*/
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int test_ltc_set_enabled(struct unit_module *m, struct gk20a *g, void *args);
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#endif
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/**
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* Test specification for: test_flush_ltc
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*
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* Description: Validate the ltc API to flush the cache.
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*
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* Test Type: Feature, Error guessing
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*
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* Targets: gops_ltc.flush, gm20b_flush_ltc
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*
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* Input: None
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*
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* Steps:
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* - Configure the registers to reflect the clean and invalidate has completed
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* for each ltc.
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* - Call the flush API.
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* - Configure the registers to reflect the clean and invalidate are pending
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* for each ltc.
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* - Call the flush API to get branch coverage of the timeout handling.
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*
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* Output: Returns PASS if register is configured correctly. FAIL otherwise.
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*/
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int test_flush_ltc(struct unit_module *m, struct gk20a *g, void *args);
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/**
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* @}
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*/
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#endif /* UNIT_NVGPU_LTC_H */
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