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d40f3fb273
- Made changes to MC to get pmu interrrupts Change-Id: I07aaec8392b1fbb34ae727bc7547a571aaeeb814 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/661212 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
32 lines
1.0 KiB
C
32 lines
1.0 KiB
C
/*
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* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef MC_GP20B_H
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#define MC_GP20B_H
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struct gk20a;
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enum MC_INTERRUPT_REGLIST {
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NVGPU_MC_INTR_STALLING = 0,
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NVGPU_MC_INTR_NONSTALLING,
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};
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void gp10b_init_mc(struct gpu_ops *gops);
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void mc_gp10b_intr_enable(struct gk20a *g);
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void mc_gp10b_intr_unit_config(struct gk20a *g, bool enable,
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bool is_stalling, u32 mask);
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irqreturn_t mc_gp10b_isr_stall(struct gk20a *g);
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irqreturn_t mc_gp10b_isr_nonstall(struct gk20a *g);
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irqreturn_t mc_gp10b_intr_thread_stall(struct gk20a *g);
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irqreturn_t mc_gp10b_intr_thread_nonstall(struct gk20a *g);
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#endif
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