mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 09:12:24 +03:00
The following CL contains the following VBIOS thermal table parsing and PMU interface support. 1) Thermal device table 2) Thermal channel table JIRA DNVGPU-130 Change-Id: Ie3abab4bf099a022b1b59db96811c2ed44079519 Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: http://git-master/r/1240630 (cherry picked from commit 814962a4be0a8cd0cddc7bc5211c62308ab1fea2) Reviewed-on: http://git-master/r/1246210 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
46 lines
1.1 KiB
C
46 lines
1.1 KiB
C
/*
|
|
* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms and conditions of the GNU General Public License,
|
|
* version 2, as published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope it will be useful, but WITHOUT
|
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
* more details.
|
|
*/
|
|
|
|
#include "gk20a/gk20a.h"
|
|
#include "thrm.h"
|
|
#include "thrmpmu.h"
|
|
|
|
u32 therm_domain_sw_setup(struct gk20a *g)
|
|
{
|
|
u32 status;
|
|
|
|
status = therm_device_sw_setup(g);
|
|
if (status) {
|
|
gk20a_err(dev_from_gk20a(g),
|
|
"error creating boardobjgrp for therm devices, status - 0x%x",
|
|
status);
|
|
goto exit;
|
|
}
|
|
|
|
status = therm_channel_sw_setup(g);
|
|
if (status) {
|
|
gk20a_err(dev_from_gk20a(g),
|
|
"error creating boardobjgrp for therm channel, status - 0x%x",
|
|
status);
|
|
goto exit;
|
|
}
|
|
|
|
exit:
|
|
return status;
|
|
}
|
|
|
|
u32 therm_domain_pmu_setup(struct gk20a *g)
|
|
{
|
|
return therm_send_pmgr_tables_to_pmu(g);
|
|
}
|