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1701a267bc
Create ramfc under common/fifo Created the following HAL: - ramfc.setup - ramfc.commit_userd Moved setup code to ramfc HAL: - vgpu_channel_setup_ramfc - gk20a_fifo_setup_ramfc - channel_gp10b_setup_ramfc - channel_gv11b_setup_ramfc - channel_tu104_setup_ramfc Renamed as: - <chip>_ramfc_setup Moved commit userd code to ramfc HAL: - gk20a_fifo_commit_userd - channel_gp10b_commit_userd Renamed as: - <chip>_ramfc_commit_userd Jira NVGPU-1750 Change-Id: Ieb1bd2866fd77601edd218f879ababf4f90db54a Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2069947 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
34 lines
1.4 KiB
C
34 lines
1.4 KiB
C
/*
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* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_RAMFC_VGPU_H
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#define NVGPU_RAMFC_VGPU_H
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#include <nvgpu/types.h>
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struct channel_gk20a;
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int vgpu_ramfc_setup(struct channel_gk20a *ch, u64 gpfifo_base,
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u32 gpfifo_entries, u64 pbdma_acquire_timeout, u32 flags);
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#endif /* NVGPU_RAMFC_VGPU_H */
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