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a0bdf6e470
Create a new directory gr under common vgpu path moving all vgpu common gr files under that directory. Move vgpu gr ctx implementations to a new file ctx_vgpu.c and create corresponding header file. Also modify parameters of some functions in ctx_vgpu.c to not access channel/tsg/fifo constructs. Jira GVSCI-334 Change-Id: I3498b10db62194df2871eb81fc5c5cb04b42abc3 Signed-off-by: Aparna Das <aparnad@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2013350 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
52 lines
2.2 KiB
C
52 lines
2.2 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef CTX_VGPU_H
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#define CTX_VGPU_H
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struct gk20a;
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struct nvgpu_gr_ctx;
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struct vm_gk20a;
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struct nvgpu_gr_global_ctx_buffer_desc;
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int vgpu_gr_alloc_gr_ctx(struct gk20a *g,
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struct nvgpu_gr_ctx *gr_ctx,
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struct vm_gk20a *vm);
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void vgpu_gr_free_gr_ctx(struct gk20a *g,
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struct vm_gk20a *vm, struct nvgpu_gr_ctx *gr_ctx);
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int vgpu_gr_alloc_patch_ctx(struct gk20a *g, struct nvgpu_gr_ctx *gr_ctx,
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struct vm_gk20a *ch_vm, u64 virt_ctx);
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void vgpu_gr_free_patch_ctx(struct gk20a *g, struct vm_gk20a *vm,
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struct nvgpu_gr_ctx *gr_ctx);
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int vgpu_gr_alloc_pm_ctx(struct gk20a *g, struct nvgpu_gr_ctx *gr_ctx,
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struct vm_gk20a *vm);
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void vgpu_gr_free_pm_ctx(struct gk20a *g, struct vm_gk20a *vm,
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struct nvgpu_gr_ctx *gr_ctx);
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void vgpu_gr_unmap_global_ctx_buffers(struct gk20a *g,
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struct nvgpu_gr_ctx *gr_ctx, struct vm_gk20a *ch_vm);
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int vgpu_gr_map_global_ctx_buffers(struct gk20a *g, struct nvgpu_gr_ctx *gr_ctx,
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struct nvgpu_gr_global_ctx_buffer_desc *global_ctx_buffer,
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struct vm_gk20a *ch_vm, u64 virt_ctx);
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int vgpu_gr_load_golden_ctx_image(struct gk20a *g, u64 virt_ctx);
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#endif
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