mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 17:36:20 +03:00
3885fe099a
Moved pmuif/* headers to drivers/gpu/nvgpu/include/nvgpu folder to support cross platform feature implementation. Made changes to files which accessed include pmuif/* to reflect pmuif/* movement changes. Deleted includes of gk20a.h/pmu_gk20a.h from pmuif/*.h files. Jira NVGPU-19 Change-Id: Iace4e107c24bdaff08a407eae3b147959173e485 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1299823 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
92 lines
2.4 KiB
C
92 lines
2.4 KiB
C
/*
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* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include "gk20a/gk20a.h"
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#include "boardobj.h"
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#include "boardobjgrp_e255.h"
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#include "ctrl/ctrlboardobj.h"
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#include "boardobjgrp.h"
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#include "boardobjgrpmask.h"
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u32 boardobjgrpconstruct_e255(struct boardobjgrp_e255 *pboardobjgrp_e255)
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{
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u32 status = 0;
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u8 objslots;
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gk20a_dbg_info("");
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objslots = 255;
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status = boardobjgrpmask_e255_init(&pboardobjgrp_e255->mask, NULL);
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if (status)
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goto boardobjgrpconstruct_e255_exit;
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pboardobjgrp_e255->super.type = CTRL_BOARDOBJGRP_TYPE_E255;
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pboardobjgrp_e255->super.ppobjects = pboardobjgrp_e255->objects;
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pboardobjgrp_e255->super.objslots = objslots;
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pboardobjgrp_e255->super.mask = &(pboardobjgrp_e255->mask.super);
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status = boardobjgrp_construct_super(&pboardobjgrp_e255->super);
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if (status)
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goto boardobjgrpconstruct_e255_exit;
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pboardobjgrp_e255->super.destruct = boardobjgrpdestruct_e255;
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pboardobjgrp_e255->super.pmuhdrdatainit =
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boardobjgrp_pmuhdrdatainit_e255;
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boardobjgrpconstruct_e255_exit:
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return status;
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}
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u32 boardobjgrpdestruct_e255(struct boardobjgrp *pboardobjgrp)
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{
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u32 status = 0;
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gk20a_dbg_info("");
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pboardobjgrp->mask = NULL;
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pboardobjgrp->objslots = 0;
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pboardobjgrp->ppobjects = NULL;
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return status;
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}
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u32 boardobjgrp_pmuhdrdatainit_e255(struct gk20a *g,
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struct boardobjgrp *pboardobjgrp,
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struct nv_pmu_boardobjgrp_super *pboardobjgrppmu,
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struct boardobjgrpmask *mask)
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{
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struct nv_pmu_boardobjgrp_e255 *pgrpe255 =
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(struct nv_pmu_boardobjgrp_e255 *)pboardobjgrppmu;
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u32 status;
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gk20a_dbg_info("");
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if (pboardobjgrp == NULL)
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return -EINVAL;
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if (pboardobjgrppmu == NULL)
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return -EINVAL;
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status = boardobjgrpmask_export(mask,
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mask->bitcount,
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&pgrpe255->obj_mask.super);
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if (status) {
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gk20a_err(dev_from_gk20a(g), "e255 init:failed export grpmask");
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return status;
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}
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return boardobjgrp_pmuhdrdatainit_super(g,
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pboardobjgrp, pboardobjgrppmu, mask);
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}
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