mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
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Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch covers the debug and dbg_session_ops sub-modules of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: Id51feeccbea91f884a6057efc680566a7d5d0b6d Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1514822 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
373 lines
9.5 KiB
C
373 lines
9.5 KiB
C
/*
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* Copyright (C) 2017 NVIDIA Corporation. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include "debug_cde.h"
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#include "debug_ce.h"
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#include "debug_fifo.h"
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#include "debug_gr.h"
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#include "debug_mm.h"
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#include "debug_allocator.h"
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#include "debug_kmem.h"
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#include "debug_pmu.h"
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#include "debug_sched.h"
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#include "os_linux.h"
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#include "gk20a/gk20a.h"
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#include "gk20a/platform_gk20a.h"
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#include <linux/debugfs.h>
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#include <linux/seq_file.h>
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#include <nvgpu/debug.h>
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unsigned int gk20a_debug_trace_cmdbuf;
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static inline void gk20a_debug_write_printk(void *ctx, const char *str,
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size_t len)
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{
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pr_info("%s", str);
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}
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static inline void gk20a_debug_write_to_seqfile(void *ctx, const char *str,
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size_t len)
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{
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seq_write((struct seq_file *)ctx, str, len);
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}
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void gk20a_debug_output(struct gk20a_debug_output *o,
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const char *fmt, ...)
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{
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va_list args;
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int len;
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va_start(args, fmt);
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len = vsnprintf(o->buf, sizeof(o->buf), fmt, args);
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va_end(args);
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o->fn(o->ctx, o->buf, len);
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}
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static int gk20a_gr_dump_regs(struct gk20a *g,
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struct gk20a_debug_output *o)
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{
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if (g->ops.gr.dump_gr_regs)
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gr_gk20a_elpg_protected_call(g, g->ops.gr.dump_gr_regs(g, o));
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return 0;
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}
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int gk20a_gr_debug_dump(struct gk20a *g)
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{
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struct gk20a_debug_output o = {
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.fn = gk20a_debug_write_printk
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};
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gk20a_gr_dump_regs(g, &o);
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return 0;
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}
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static int gk20a_gr_debug_show(struct seq_file *s, void *unused)
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{
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struct device *dev = s->private;
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struct gk20a *g = gk20a_get_platform(dev)->g;
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struct gk20a_debug_output o = {
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.fn = gk20a_debug_write_to_seqfile,
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.ctx = s,
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};
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int err;
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err = gk20a_busy(g);
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if (err) {
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nvgpu_err(g, "failed to power on gpu: %d", err);
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return -EINVAL;
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}
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gk20a_gr_dump_regs(g, &o);
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gk20a_idle(g);
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return 0;
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}
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void gk20a_debug_dump(struct gk20a *g)
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{
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struct gk20a_platform *platform = gk20a_get_platform(dev_from_gk20a(g));
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struct gk20a_debug_output o = {
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.fn = gk20a_debug_write_printk
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};
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if (platform->dump_platform_dependencies)
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platform->dump_platform_dependencies(dev_from_gk20a(g));
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/* HAL only initialized after 1st power-on */
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if (g->ops.debug.show_dump)
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g->ops.debug.show_dump(g, &o);
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}
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static int gk20a_debug_show(struct seq_file *s, void *unused)
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{
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struct device *dev = s->private;
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struct gk20a_debug_output o = {
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.fn = gk20a_debug_write_to_seqfile,
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.ctx = s,
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};
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struct gk20a *g;
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int err;
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g = gk20a_get_platform(dev)->g;
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err = gk20a_busy(g);
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if (err) {
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nvgpu_err(g, "failed to power on gpu: %d", err);
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return -EFAULT;
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}
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/* HAL only initialized after 1st power-on */
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if (g->ops.debug.show_dump)
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g->ops.debug.show_dump(g, &o);
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gk20a_idle(g);
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return 0;
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}
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static int gk20a_gr_debug_open(struct inode *inode, struct file *file)
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{
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return single_open(file, gk20a_gr_debug_show, inode->i_private);
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}
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static int gk20a_debug_open(struct inode *inode, struct file *file)
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{
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return single_open(file, gk20a_debug_show, inode->i_private);
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}
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static const struct file_operations gk20a_gr_debug_fops = {
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.open = gk20a_gr_debug_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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static const struct file_operations gk20a_debug_fops = {
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.open = gk20a_debug_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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void gk20a_debug_show_dump(struct gk20a *g, struct gk20a_debug_output *o)
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{
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g->ops.fifo.dump_pbdma_status(g, o);
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g->ops.fifo.dump_eng_status(g, o);
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gk20a_debug_dump_all_channel_status_ramfc(g, o);
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}
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static int railgate_residency_show(struct seq_file *s, void *data)
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{
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struct gk20a *g = s->private;
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struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
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unsigned long time_since_last_state_transition_ms;
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unsigned long total_rail_gate_time_ms;
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unsigned long total_rail_ungate_time_ms;
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if (platform->is_railgated(dev_from_gk20a(g))) {
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time_since_last_state_transition_ms =
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jiffies_to_msecs(jiffies -
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g->pstats.last_rail_gate_complete);
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total_rail_ungate_time_ms = g->pstats.total_rail_ungate_time_ms;
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total_rail_gate_time_ms =
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g->pstats.total_rail_gate_time_ms +
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time_since_last_state_transition_ms;
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} else {
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time_since_last_state_transition_ms =
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jiffies_to_msecs(jiffies -
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g->pstats.last_rail_ungate_complete);
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total_rail_gate_time_ms = g->pstats.total_rail_gate_time_ms;
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total_rail_ungate_time_ms =
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g->pstats.total_rail_ungate_time_ms +
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time_since_last_state_transition_ms;
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}
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seq_printf(s, "Time with Rails Gated: %lu ms\n"
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"Time with Rails UnGated: %lu ms\n"
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"Total railgating cycles: %lu\n",
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total_rail_gate_time_ms,
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total_rail_ungate_time_ms,
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g->pstats.railgating_cycle_count - 1);
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return 0;
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}
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static int railgate_residency_open(struct inode *inode, struct file *file)
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{
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return single_open(file, railgate_residency_show, inode->i_private);
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}
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static const struct file_operations railgate_residency_fops = {
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.open = railgate_residency_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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static int gk20a_railgating_debugfs_init(struct gk20a *g)
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{
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struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
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struct dentry *d;
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if (!g->can_railgate)
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return 0;
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d = debugfs_create_file(
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"railgate_residency", S_IRUGO|S_IWUSR, platform->debugfs, g,
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&railgate_residency_fops);
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if (!d)
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return -ENOMEM;
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return 0;
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}
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void gk20a_debug_init(struct gk20a *g, const char *debugfs_symlink)
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{
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struct device *dev = dev_from_gk20a(g);
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struct gk20a_platform *platform = dev_get_drvdata(dev);
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platform->debugfs = debugfs_create_dir(dev_name(dev), NULL);
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if (!platform->debugfs)
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return;
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if (debugfs_symlink)
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platform->debugfs_alias =
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debugfs_create_symlink(debugfs_symlink,
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NULL, dev_name(dev));
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debugfs_create_file("status", S_IRUGO, platform->debugfs,
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dev, &gk20a_debug_fops);
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debugfs_create_file("gr_status", S_IRUGO, platform->debugfs,
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dev, &gk20a_gr_debug_fops);
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debugfs_create_u32("trace_cmdbuf", S_IRUGO|S_IWUSR,
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platform->debugfs, &gk20a_debug_trace_cmdbuf);
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debugfs_create_u32("ch_wdt_timeout_ms", S_IRUGO|S_IWUSR,
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platform->debugfs, &g->ch_wdt_timeout_ms);
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debugfs_create_u32("disable_syncpoints", S_IRUGO|S_IWUSR,
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platform->debugfs, &g->disable_syncpoints);
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/* Legacy debugging API. */
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debugfs_create_u32("dbg_mask", S_IRUGO|S_IWUSR,
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platform->debugfs, &nvgpu_dbg_mask);
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/* New debug logging API. */
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debugfs_create_u32("log_mask", S_IRUGO|S_IWUSR,
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platform->debugfs, &g->log_mask);
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debugfs_create_u32("log_trace", S_IRUGO|S_IWUSR,
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platform->debugfs, &g->log_trace);
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nvgpu_spinlock_init(&g->debugfs_lock);
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g->mm.ltc_enabled = true;
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g->mm.ltc_enabled_debug = true;
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g->debugfs_ltc_enabled =
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debugfs_create_bool("ltc_enabled", S_IRUGO|S_IWUSR,
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platform->debugfs,
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&g->mm.ltc_enabled_debug);
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g->debugfs_gr_idle_timeout_default =
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debugfs_create_u32("gr_idle_timeout_default_us",
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S_IRUGO|S_IWUSR, platform->debugfs,
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&g->gr_idle_timeout_default);
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g->debugfs_timeouts_enabled =
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debugfs_create_bool("timeouts_enabled",
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S_IRUGO|S_IWUSR,
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platform->debugfs,
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&g->timeouts_enabled);
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g->debugfs_bypass_smmu =
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debugfs_create_bool("bypass_smmu",
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S_IRUGO|S_IWUSR,
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platform->debugfs,
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&g->mm.bypass_smmu);
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g->debugfs_disable_bigpage =
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debugfs_create_bool("disable_bigpage",
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S_IRUGO|S_IWUSR,
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platform->debugfs,
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&g->mm.disable_bigpage);
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g->debugfs_timeslice_low_priority_us =
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debugfs_create_u32("timeslice_low_priority_us",
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S_IRUGO|S_IWUSR,
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platform->debugfs,
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&g->timeslice_low_priority_us);
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g->debugfs_timeslice_medium_priority_us =
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debugfs_create_u32("timeslice_medium_priority_us",
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S_IRUGO|S_IWUSR,
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platform->debugfs,
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&g->timeslice_medium_priority_us);
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g->debugfs_timeslice_high_priority_us =
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debugfs_create_u32("timeslice_high_priority_us",
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S_IRUGO|S_IWUSR,
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platform->debugfs,
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&g->timeslice_high_priority_us);
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g->debugfs_runlist_interleave =
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debugfs_create_bool("runlist_interleave",
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S_IRUGO|S_IWUSR,
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platform->debugfs,
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&g->runlist_interleave);
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#ifdef CONFIG_ARCH_TEGRA_18x_SOC
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g->gr.t18x.ctx_vars.debugfs_force_preemption_gfxp =
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debugfs_create_bool("force_preemption_gfxp", S_IRUGO|S_IWUSR,
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platform->debugfs,
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&g->gr.t18x.ctx_vars.force_preemption_gfxp);
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g->gr.t18x.ctx_vars.debugfs_force_preemption_cilp =
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debugfs_create_bool("force_preemption_cilp", S_IRUGO|S_IWUSR,
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platform->debugfs,
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&g->gr.t18x.ctx_vars.force_preemption_cilp);
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g->gr.t18x.ctx_vars.debugfs_dump_ctxsw_stats =
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debugfs_create_bool("dump_ctxsw_stats_on_channel_close",
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S_IRUGO|S_IWUSR, platform->debugfs,
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&g->gr.t18x.
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ctx_vars.dump_ctxsw_stats_on_channel_close);
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#endif
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gr_gk20a_debugfs_init(g);
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gk20a_pmu_debugfs_init(g);
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gk20a_railgating_debugfs_init(g);
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gk20a_cde_debugfs_init(g);
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gk20a_ce_debugfs_init(g);
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nvgpu_alloc_debugfs_init(g);
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gk20a_mm_debugfs_init(g);
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gk20a_fifo_debugfs_init(g);
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gk20a_sched_debugfs_init(g);
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#ifdef CONFIG_NVGPU_TRACK_MEM_USAGE
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nvgpu_kmem_debugfs_init(g);
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#endif
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}
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void gk20a_debug_deinit(struct gk20a *g)
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{
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struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
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if (!platform->debugfs)
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return;
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gk20a_fifo_debugfs_deinit(g);
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debugfs_remove_recursive(platform->debugfs);
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debugfs_remove_recursive(platform->debugfs_alias);
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}
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