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Added PMU thermal slct RPC handling for WARN_TEMP threshold configuration. JIRA DNVGPU-130 Change-Id: I5011db5f08476516f72722e639838e968e7e60dd Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: http://git-master/r/1242132 (cherry picked from commit 6e87a23ca04be435107da801c15f7b55a1f45e8b) Reviewed-on: http://git-master/r/1246211 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
72 lines
1.7 KiB
C
72 lines
1.7 KiB
C
/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _GPMUIFTHERM_H_
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#define _GPMUIFTHERM_H_
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#include "gk20a/pmu_common.h"
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#define NV_PMU_THERM_CMD_ID_RPC 0x00000002
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#define NV_PMU_THERM_MSG_ID_RPC 0x00000002
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#define NV_PMU_THERM_RPC_ID_SLCT_EVENT_TEMP_TH_SET 0x00000006
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#define NV_PMU_THERM_EVENT_THERMAL_1 0x00000004
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struct nv_pmu_therm_rpc_slct_event_temp_th_set {
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s32 temp_threshold;
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u8 event_id;
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flcn_status flcn_stat;
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};
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struct nv_pmu_therm_rpc {
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u8 function;
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bool b_supported;
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union {
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struct nv_pmu_therm_rpc_slct_event_temp_th_set slct_event_temp_th_set;
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} params;
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};
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struct nv_pmu_therm_cmd_rpc {
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u8 cmd_type;
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u8 pad[3];
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struct nv_pmu_allocation request;
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};
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#define NV_PMU_THERM_CMD_RPC_ALLOC_OFFSET \
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offsetof(struct nv_pmu_therm_cmd_rpc, request)
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struct nv_pmu_therm_cmd {
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union {
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u8 cmd_type;
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struct nv_pmu_therm_cmd_rpc rpc;
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};
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};
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struct nv_pmu_therm_msg_rpc {
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u8 msg_type;
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u8 rsvd[3];
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struct nv_pmu_allocation response;
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};
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#define NV_PMU_THERM_MSG_RPC_ALLOC_OFFSET \
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offsetof(struct nv_pmu_therm_msg_rpc, response)
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struct nv_pmu_therm_msg {
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union {
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u8 msg_type;
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struct nv_pmu_therm_msg_rpc rpc;
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};
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};
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#endif
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