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efbe371fd5
Make a hal/mm/gmmu sub-unit for the GMMU HAL code. Also move the gk20a specific HAL code there. gp10b will happen in the next patch. This change also updates all the GMMU related HAL usage, of which there is quite a bit. Generally the only change is a .gmmu needs to be inserted into the HAL path. Each HAL init was also updated. JIRA NVGPU-2042 Change-Id: I6c46bdfddb8e021f56103d9457fb3e2a226f8947 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2099693 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
48 lines
1.9 KiB
C
48 lines
1.9 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef HAL_MM_GMMU_GMMU_GK20A_H
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#define HAL_MM_GMMU_GMMU_GK20A_H
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#include <nvgpu/types.h>
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#include <nvgpu/gmmu.h>
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struct gk20a;
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/*
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* Must include the <nvgpu/gmmu.h> header directly since the compiler needs to
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* know the actual type before it declares an array (even if the size is not
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* technically known here.
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*/
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extern const struct gk20a_mmu_level gk20a_mm_levels_64k[];
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extern const struct gk20a_mmu_level gk20a_mm_levels_128k[];
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const struct gk20a_mmu_level *gk20a_mm_get_mmu_levels(struct gk20a *g,
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u32 big_page_size);
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u32 gk20a_get_pde_pgsz(struct gk20a *g, const struct gk20a_mmu_level *l,
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struct nvgpu_gmmu_pd *pd, u32 pd_idx);
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u32 gk20a_get_pte_pgsz(struct gk20a *g, const struct gk20a_mmu_level *l,
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struct nvgpu_gmmu_pd *pd, u32 pd_idx);
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#endif
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