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Similar HW header update as has been done for all the other chips. HW header files are located under: drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/ And can be included like so: #include <nvgpu/hw/gv11b/hw_gr_gv11b.h> Bug 1799159 Change-Id: If39bd71480a34f85bf25f4c36aec0f8f6de4dc9f Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1284433 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
55 lines
1.6 KiB
C
55 lines
1.6 KiB
C
/*
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* GV11B master
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*
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* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/types.h>
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#include "gk20a/gk20a.h"
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#include "gp10b/mc_gp10b.h"
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#include "mc_gv11b.h"
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#include <nvgpu/hw/gv11b/hw_mc_gv11b.h>
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static void mc_gv11b_intr_enable(struct gk20a *g)
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{
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u32 eng_intr_mask = gk20a_fifo_engine_interrupt_mask(g);
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gk20a_writel(g, mc_intr_en_clear_r(NVGPU_MC_INTR_STALLING),
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0xffffffff);
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g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_STALLING] =
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mc_intr_pfifo_pending_f()
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| eng_intr_mask;
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gk20a_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_STALLING),
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g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_STALLING]);
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gk20a_writel(g, mc_intr_en_clear_r(NVGPU_MC_INTR_NONSTALLING),
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0xffffffff);
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g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_NONSTALLING] =
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mc_intr_pfifo_pending_f()
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| mc_intr_priv_ring_pending_f()
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| mc_intr_ltc_pending_f()
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| mc_intr_pbus_pending_f()
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| eng_intr_mask;
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gk20a_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_NONSTALLING),
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g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_NONSTALLING]);
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}
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void gv11b_init_mc(struct gpu_ops *gops)
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{
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gp10b_init_mc(gops);
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gops->mc.intr_enable = mc_gv11b_intr_enable;
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}
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