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Various gv11b register accessors are passed as function pointer to NVGPU_ECC_ERR. pmu logic needs access to head, tail, mutex registers as function pointers. fix the same. JIRA NVGPU-3733 Change-Id: I5668fedaac187fab052ee5d68a10f7e2d6d35413 Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2150880 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>