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8428c82c81
Add a generic nvgpu_os_buffer type, defined by each OS, to abstract a "user" buffer. This allows the comptag interface to be used in the core code. The end goal of this patch is to allow the OS specific mapping code to call a generic mapping function that handles most of the mapping logic. The problem is a lot of the logic involves comptags which are highly dependent on the operating systems buffer management scheme. With this, each OS can implement the buffer comptag mechanics however it wishes without the core MM code caring. JIRA NVGPU-30 JIRA NVGPU-223 Change-Id: Iaf64bc52e01ef3f262b4f8f9173a84384db7dc3e Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1583986 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
64 lines
1.7 KiB
C
64 lines
1.7 KiB
C
/*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __COMMON_LINUX_DMABUF_H__
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#define __COMMON_LINUX_DMABUF_H__
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#include <nvgpu/comptags.h>
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#include <nvgpu/list.h>
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#include <nvgpu/lock.h>
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#include <nvgpu/gmmu.h>
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struct sg_table;
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struct dma_buf;
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struct dma_buf_attachment;
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struct device;
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struct gk20a;
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struct gk20a_buffer_state;
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struct gk20a_dmabuf_priv {
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struct nvgpu_mutex lock;
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struct gk20a *g;
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struct gk20a_comptag_allocator *comptag_allocator;
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struct gk20a_comptags comptags;
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struct dma_buf_attachment *attach;
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struct sg_table *sgt;
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int pin_count;
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struct nvgpu_list_node states;
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u64 buffer_id;
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};
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struct sg_table *gk20a_mm_pin(struct device *dev, struct dma_buf *dmabuf);
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void gk20a_mm_unpin(struct device *dev, struct dma_buf *dmabuf,
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struct sg_table *sgt);
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int gk20a_dmabuf_alloc_drvdata(struct dma_buf *dmabuf, struct device *dev);
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int gk20a_dmabuf_get_state(struct dma_buf *dmabuf, struct gk20a *g,
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u64 offset, struct gk20a_buffer_state **state);
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int gk20a_mm_get_buffer_info(struct device *dev, int dmabuf_fd,
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u64 *buffer_id, u64 *buffer_len);
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#endif
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