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60845e71f1
MISRA Rule-17.7 requires the return value of all functions to be used. Fix is either to use the return value or change the function to return void. The ACR operations acr_fill_bl_dmem_desc and patch_wpr_info_to_ucode were returning an int that was always 0. This patch changes their signature to return void instead. JIRA NVGPU-3032 Change-Id: I4116db3b5aec92ee9b914f5549d6c7c994affd4a Signed-off-by: Nicolas Benech <nbenech@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2090042 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Adeel Raza <araza@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
38 lines
1.5 KiB
C
38 lines
1.5 KiB
C
/*
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* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef ACR_SW_GV100_H
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#define ACR_SW_GV100_H
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#include <nvgpu/types.h>
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struct gk20a;
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struct nvgpu_acr;
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struct hs_acr;
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void gv100_acr_fill_bl_dmem_desc(struct gk20a *g, struct nvgpu_acr *acr,
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struct hs_acr *acr_desc, u32 *acr_ucode_header);
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void nvgpu_gv100_acr_sw_init(struct gk20a *g, struct nvgpu_acr *acr);
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#endif /* ACR_SW_GV100_H */
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