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a6f0ce7971
Move the code involved in dealing with minion into a separate unit called "nvlink_minion". This unit includes minion HW access, ucode handling, exposing state of minion and also dealing with minion interrupts. The interfaces to this unit are partially exposed using g->ops.nvlink.minion ops and rest are part of nvlink_minion.h public header. JIRA NVGPU-2860 Change-Id: Iea9288ea5f0b26688540b1eb8ab64afd756941a4 Signed-off-by: Tejal Kudav <tkudav@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2030103 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
45 lines
2.0 KiB
C
45 lines
2.0 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef MINION_GV100_H
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#define MINION_GV100_H
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#include <nvgpu/types.h>
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enum nvgpu_nvlink_minion_dlcmd;
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struct gk20a;
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u32 gv100_nvlink_minion_base_addr(struct gk20a *g);
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bool gv100_nvlink_minion_is_running(struct gk20a *g);
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int gv100_nvlink_minion_is_boot_complete(struct gk20a *g, bool *boot_cmplte);
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u32 gv100_nvlink_minion_get_dlcmd_ordinal(struct gk20a *g,
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enum nvgpu_nvlink_minion_dlcmd dlcmd);
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int gv100_nvlink_minion_send_dlcmd(struct gk20a *g, u32 link_id,
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enum nvgpu_nvlink_minion_dlcmd dlcmd, bool sync);
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void gv100_nvlink_minion_clear_intr(struct gk20a *g);
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void gv100_nvlink_minion_init_intr(struct gk20a *g);
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void gv100_nvlink_minion_enable_link_intr(struct gk20a *g, u32 link_id,
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bool enable);
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void gv100_nvlink_minion_falcon_isr(struct gk20a *g);
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void gv100_nvlink_minion_isr(struct gk20a *g);
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#endif /* MINION_GV100_H */
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