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5ee9a446b5
MISRA Advisory Rule states that the precedence of operators within expressions should be made explicit. This change removes the Advisory Rule 12.1 violations from various common units. Jira NVGPU-3178 Change-Id: I4b77238afdb929c81320efa93ac105f9e69af9cd Signed-off-by: Scott Long <scottl@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2277480 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
91 lines
2.2 KiB
C
91 lines
2.2 KiB
C
/*
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* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/string.h>
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#include <nvgpu/log.h>
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#include <nvgpu/static_analysis.h>
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void
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nvgpu_memcpy(u8 *destb, const u8 *srcb, size_t n)
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{
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(void) memcpy(destb, srcb, n);
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}
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int
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nvgpu_memcmp(const u8 *b1, const u8 *b2, size_t n)
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{
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return memcmp(b1, b2, n);
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}
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int nvgpu_strnadd_u32(char *dst, const u32 value, size_t size, u32 radix)
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{
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int n;
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u32 v;
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char *p;
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u32 digit;
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if ((radix < 2U) || (radix > 16U)) {
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return 0;
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}
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/* how many digits do we need ? */
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n = 0;
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v = value;
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do {
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n = nvgpu_safe_add_s32(n, 1);
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v = v / radix;
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} while (v > 0U);
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/* bail out if there is not room for '\0' */
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if (n >= nvgpu_safe_cast_u64_to_s32(size)) {
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return 0;
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}
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/* number of digits (not including '\0') */
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p = dst + n;
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/* terminate with '\0' */
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*p = '\0';
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p--;
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v = value;
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do {
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digit = v % radix;
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*p = "0123456789abcdef"[digit];
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v = v / radix;
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p--;
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}
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while (v > 0U);
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return n;
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}
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bool nvgpu_mem_is_word_aligned(struct gk20a *g, u8 *addr)
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{
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if (((unsigned long)addr % 4UL) != 0UL) {
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nvgpu_log_info(g, "addr (%p) not 4-byte aligned", addr);
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return false;
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}
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return true;
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}
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