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bcbc87dc2e
Interface header files for PMU features are now moved under PMU header files directory include/nvgpu/pmu. And fix bulk of coding style issues. Update header file names and guards. JIRA NVGPU-1971 Change-Id: Idf53fc09d8928d1b0a1cd16eef886de010dae06b Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2093006 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
92 lines
2.8 KiB
C
92 lines
2.8 KiB
C
/*
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* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_PMUIF_CTRLBOARDOBJ_H
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#define NVGPU_PMUIF_CTRLBOARDOBJ_H
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#include <nvgpu/types.h>
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struct ctrl_boardobj {
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u8 type;
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};
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#define CTRL_BOARDOBJGRP_TYPE_INVALID 0x00U
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#define CTRL_BOARDOBJGRP_TYPE_E32 0x01U
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#define CTRL_BOARDOBJGRP_TYPE_E255 0x02U
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#define CTRL_BOARDOBJGRP_E32_MAX_OBJECTS 32U
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#define CTRL_BOARDOBJGRP_E255_MAX_OBJECTS 255U
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#define CTRL_BOARDOBJ_MAX_BOARD_OBJECTS \
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CTRL_BOARDOBJGRP_E32_MAX_OBJECTS
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#define CTRL_BOARDOBJ_IDX_INVALID 255U
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#define CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_BIT_SIZE 32U
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#define CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_INDEX(_bit) \
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((_bit) / CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_BIT_SIZE)
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#define CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_OFFSET(_bit) \
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((_bit) % CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_BIT_SIZE)
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#define CTRL_BOARDOBJGRP_MASK_DATA_SIZE(_bits) \
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(CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_INDEX((_bits) - 1U) + 1U)
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#define CTRL_BOARDOBJGRP_MASK_ARRAY_START_SIZE 1U
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#define CTRL_BOARDOBJGRP_MASK_ARRAY_EXTENSION_SIZE(_bits) \
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(CTRL_BOARDOBJGRP_MASK_DATA_SIZE(_bits) - \
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CTRL_BOARDOBJGRP_MASK_ARRAY_START_SIZE)
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struct ctrl_boardobjgrp_mask {
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u32 data[1];
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};
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struct ctrl_boardobjgrp_mask_e32 {
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struct ctrl_boardobjgrp_mask super;
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};
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struct ctrl_boardobjgrp_mask_e255 {
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struct ctrl_boardobjgrp_mask super;
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u32 data_e255[7];
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};
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struct ctrl_boardobjgrp_super {
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struct ctrl_boardobjgrp_mask obj_mask;
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};
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struct ctrl_boardobjgrp_e32 {
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struct ctrl_boardobjgrp_mask_e32 obj_mask;
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};
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struct CTRL_boardobjgrp_e255 {
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struct ctrl_boardobjgrp_mask_e255 obj_mask;
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};
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struct ctrl_boardobjgrp {
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u32 obj_mask;
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};
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#endif /* NVGPU_PMUIF_CTRLBOARDOBJ_H */
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