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29cc82844e
The vm_reserve_va_node struct is essentially a special VM area that can be used for sparse mappings and fixed mappings. The name of this struct is somewhat confusing (as node is typically used for list items). Though this struct is a part of a list it doesn't really make sense to call this a list item since it's much more. Based on that the struct has been renamed to nvgpu_vm_area to capture the actual use of the struct more accurately. This also moves all of the management code of vm areas to a new file devoted solely to vm_area management. Also add a brief overview of the VM architecture. This should help other people follow along the hierachy of ownership and lifetimes in the rather complex MM code. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: If85e1cf868031d0dc265e7bed50b58a2aed2602e Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1477744 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
94 lines
2.5 KiB
C
94 lines
2.5 KiB
C
/*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __COMMON_LINUX_VM_PRIV_H__
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#define __COMMON_LINUX_VM_PRIV_H__
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#include <nvgpu/types.h>
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struct sg_table;
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struct dma_buf;
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struct vm_gk20a;
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struct vm_gk20a_mapping_batch;
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struct buffer_attrs {
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struct sg_table *sgt;
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u64 size;
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u64 align;
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u32 ctag_offset;
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u32 ctag_lines;
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u32 ctag_allocated_lines;
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int pgsz_idx;
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u8 kind_v;
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u8 uc_kind_v;
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bool ctag_user_mappable;
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};
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u64 nvgpu_vm_map(struct vm_gk20a *vm,
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struct dma_buf *dmabuf,
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u64 offset_align,
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u32 flags,
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int kind,
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bool user_mapped,
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int rw_flag,
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u64 buffer_offset,
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u64 mapping_size,
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struct vm_gk20a_mapping_batch *mapping_batch);
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int nvgpu_vm_map_compbits(struct vm_gk20a *vm,
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u64 mapping_gva,
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u64 *compbits_win_gva,
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u64 *mapping_iova,
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u32 flags);
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/* Note: batch may be NULL if map op is not part of a batch */
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int nvgpu_vm_map_buffer(struct vm_gk20a *vm,
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int dmabuf_fd,
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u64 *offset_align,
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u32 flags, /* NVGPU_AS_MAP_BUFFER_FLAGS_ */
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int kind,
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u64 buffer_offset,
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u64 mapping_size,
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struct vm_gk20a_mapping_batch *batch);
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void nvgpu_vm_unmap(struct vm_gk20a *vm, u64 offset);
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/* find buffer corresponding to va */
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int nvgpu_vm_find_buffer(struct vm_gk20a *vm, u64 gpu_va,
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struct dma_buf **dmabuf,
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u64 *offset);
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enum nvgpu_aperture gk20a_dmabuf_aperture(struct gk20a *g,
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struct dma_buf *dmabuf);
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int validate_fixed_buffer(struct vm_gk20a *vm,
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struct buffer_attrs *bfr,
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u64 map_offset, u64 map_size,
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struct nvgpu_vm_area **pva_node);
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int setup_buffer_kind_and_compression(struct vm_gk20a *vm,
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u32 flags,
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struct buffer_attrs *bfr,
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enum gmmu_pgsz_gk20a pgsz_idx);
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int gk20a_alloc_comptags(struct gk20a *g,
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struct device *dev,
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struct dma_buf *dmabuf,
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struct gk20a_comptag_allocator *allocator,
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u32 lines, bool user_mappable,
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u64 *ctag_map_win_size,
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u32 *ctag_map_win_ctagline);
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#endif
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