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1c40d09c4c
bug 1648908 This commit adds support for FECS ctxsw tracing. Code is compiled conditionnaly under CONFIG_GK20_CTXSW_TRACE. This feature requires an updated FECS ucode that writes one record to a ring buffer on each context switch. On RM/Kernel side, the GPU driver reads records from the master ring buffer and generates trace entries into a user-facing VM ring buffer. For each record in the master ring buffer, RM/Kernel has to retrieve the vmid+pid of the user process that submitted related work. Features currently implemented: - master ring buffer allocation - debugfs to dump master ring buffer - FECS record per context switch (with both current and new contexts) - dedicated device for ctxsw tracing (access to VM ring buffer) - SOF generation (and access to PTIMER) - VM ring buffer allocation, and reconfiguration - enable/disable tracing at user level - event-based trace filtering - context_ptr to vmid+pid mapping - read system call for ctxsw dev - mmap system call for ctxsw dev (direct access to VM ring buffer) - poll system call for ctxsw dev - save/restore register on ELPG/CG6 - separate user ring from FECS ring handling Features requiring ucode changes: - enable/disable tracing at FECS level - actual busy time on engine (bug 1642354) - master ring buffer threshold interrupt (P1) - API for GPU to CPU timestamp conversion (P1) - vmid/pid/uid based filtering (P1) Change-Id: I8e39c648221ee0fa09d5df8524b03dca83fe24f3 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1022737 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
42 lines
1.5 KiB
C
42 lines
1.5 KiB
C
/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef __CTXSW_TRACE_GK20A_H
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#define __CTXSW_TRACE_GK20A_H
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#define GK20A_CTXSW_TRACE_NUM_DEVS 1
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struct gk20a;
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struct nvgpu_ctxsw_trace_entry;
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struct channel_gk20a;
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struct channel_ctx_gk20a;
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struct gk20a_ctxsw_dev;
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struct gk20a_fecs_trace;
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int gk20a_ctxsw_dev_release(struct inode *inode, struct file *filp);
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int gk20a_ctxsw_dev_open(struct inode *inode, struct file *filp);
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long gk20a_ctxsw_dev_ioctl(struct file *filp,
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unsigned int cmd, unsigned long arg);
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ssize_t gk20a_ctxsw_dev_read(struct file *, char __user *, size_t, loff_t *);
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unsigned int gk20a_ctxsw_dev_poll(struct file *, struct poll_table_struct *);
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int gk20a_ctxsw_dev_mmap(struct file *, struct vm_area_struct *);
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int gk20a_ctxsw_trace_init(struct gk20a *);
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int gk20a_ctxsw_trace_setup(struct gk20a *, void *ctx_ptr);
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void gk20a_ctxsw_trace_cleanup(struct gk20a *);
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int gk20a_ctxsw_trace_write(struct gk20a *, struct nvgpu_ctxsw_trace_entry *);
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void gk20a_ctxsw_trace_wake_up(struct gk20a *g, int vmid);
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#endif /* __CTXSW_TRACE_GK20A_H */
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