Files
linux-nvgpu/drivers/gpu/nvgpu/Makefile
Deepak Nibade afa31cdd8c gpu: nvgpu: add support for L3 cache allocation of buffers
Add gv11b implementation of gpu_phys_addr() that checks the t19x
GMMU attributes struct to determine if L3 allocation should be
enabled. If L3 alloc is enabled then a special physical address
bit is set.

Add flag NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC to struct
nvgpu_as_map_buffer_ex_args so that User space can add a hint to
allocate buffer in L3 cache

Jira GPUT19X-10
Bug 200279508

Change-Id: I1bb9876a670b252980922aa50e3e69b802be137f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master/r/1512602
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-07-07 07:05:39 -07:00

33 lines
1.2 KiB
Makefile

nvgpu-t19x := ../../../../nvgpu-t19x/drivers/gpu/nvgpu
nvgpu-y += \
$(nvgpu-t19x)/common/mm/gmmu_t19x.o \
$(nvgpu-t19x)/common/linux/ioctl_tsg_t19x.o \
$(nvgpu-t19x)/gv11b/gv11b.o \
$(nvgpu-t19x)/gv11b/bus_gv11b.o \
$(nvgpu-t19x)/gv11b/mc_gv11b.o \
$(nvgpu-t19x)/gv11b/ltc_gv11b.o \
$(nvgpu-t19x)/gv11b/hal_gv11b.o \
$(nvgpu-t19x)/gv11b/gv11b_gating_reglist.o \
$(nvgpu-t19x)/gv11b/gr_gv11b.o \
$(nvgpu-t19x)/gv11b/fecs_trace_gv11b.o \
$(nvgpu-t19x)/gv11b/fb_gv11b.o \
$(nvgpu-t19x)/gv11b/fifo_gv11b.o \
$(nvgpu-t19x)/gv11b/mm_gv11b.o \
$(nvgpu-t19x)/gv11b/ce_gv11b.o \
$(nvgpu-t19x)/gv11b/gr_ctx_gv11b.o \
$(nvgpu-t19x)/gv11b/pmu_gv11b.o \
$(nvgpu-t19x)/gv11b/therm_gv11b.o \
$(nvgpu-t19x)/gv11b/subctx_gv11b.o \
$(nvgpu-t19x)/gv11b/regops_gv11b.o
nvgpu-$(CONFIG_TEGRA_GK20A) += $(nvgpu-t19x)/gv11b/platform_gv11b_tegra.o
nvgpu-$(CONFIG_TEGRA_GK20A_NVHOST) += $(nvgpu-t19x)/common/linux/nvhost_t19x.o
nvgpu-$(CONFIG_TEGRA_GR_VIRTUALIZATION) += \
$(nvgpu-t19x)/vgpu/gv11b/platform_gv11b_vgpu_tegra.o \
$(nvgpu-t19x)/vgpu/gv11b/vgpu_hal_gv11b.o \
$(nvgpu-t19x)/vgpu/gv11b/vgpu_gr_gv11b.o \
$(nvgpu-t19x)/vgpu/gv11b/vgpu_fifo_gv11b.o \
$(nvgpu-t19x)/vgpu/gv11b/vgpu_subctx_gv11b.o