Seema Khowala 690d560e65 gpu: nvgpu: gv11b: Use sm dbgr bpt and warp mask 0/1 ...

Instead of assuming mask_0 and mask_1 as consecutive registers,
use mask_1 and mask_0 registers for reading/writing sm dbgr warp
and bpt mask registers

JIRA GPUT19X-75

Change-Id: Ib6843d13828d899d4bd3f12bdf6701325ea760fd
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1511736
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

2017-07-05 03:06:51 -07:00

..

gpu/nvgpu

gpu: nvgpu: gv11b: Use sm dbgr bpt and warp mask 0/1

2017-07-05 03:06:51 -07:00