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c230159665
This patch adds .is_railgated() callback for the generic gpu platform. Change-Id: Ief13a6fba82b376aafbe861e8f3823a19bb7f679 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/433059 Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
127 lines
3.1 KiB
C
127 lines
3.1 KiB
C
/*
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* drivers/video/tegra/host/gk20a/platform_gk20a_generic.c
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*
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* GK20A Generic Platform Interface
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*
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* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/tegra-powergate.h>
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#include <linux/tegra_pm_domains.h>
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#include <linux/clk.h>
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#include "platform_gk20a.h"
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#include "hal_gk20a.h"
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#include "gk20a.h"
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/*
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* gk20a_generic_is_railgated()
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*
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* Check status of gk20a power rail
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*/
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static bool gk20a_generic_is_railgated(struct platform_device *pdev)
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{
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return !tegra_powergate_is_powered(TEGRA_POWERGATE_GPU);
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}
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/*
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* gk20a_generic_railgate()
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*
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* Gate (disable) gk20a power rail
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*/
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static int gk20a_generic_railgate(struct platform_device *pdev)
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{
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if (tegra_powergate_is_powered(TEGRA_POWERGATE_GPU))
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tegra_powergate_partition(TEGRA_POWERGATE_GPU);
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return 0;
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}
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/*
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* gk20a_generic_unrailgate()
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*
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* Ungate (enable) gk20a power rail
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*/
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static int gk20a_generic_unrailgate(struct platform_device *pdev)
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{
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tegra_unpowergate_partition(TEGRA_POWERGATE_GPU);
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return 0;
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}
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/*
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* gk20a_generic_get_clocks()
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*
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* This function finds clocks in tegra platform and populates
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* the clock information to gk20a platform data.
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*/
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static int gk20a_generic_get_clocks(struct platform_device *pdev)
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{
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struct gk20a_platform *platform = platform_get_drvdata(pdev);
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platform->clk[0] = clk_get_sys("tegra_gk20a.0", "PLLG_ref");
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platform->clk[1] = clk_get_sys("tegra_gk20a.0", "pwr");
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platform->clk[2] = clk_get_sys("tegra_gk20a.0", "emc");
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platform->num_clks = 3;
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if (IS_ERR(platform->clk[0]) ||
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IS_ERR(platform->clk[1]) ||
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IS_ERR(platform->clk[2]))
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goto err_get_clock;
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clk_set_rate(platform->clk[0], UINT_MAX);
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clk_set_rate(platform->clk[1], 204000000);
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clk_set_rate(platform->clk[2], UINT_MAX);
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return 0;
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err_get_clock:
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if (!IS_ERR_OR_NULL(platform->clk[0]))
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clk_put(platform->clk[0]);
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if (!IS_ERR_OR_NULL(platform->clk[1]))
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clk_put(platform->clk[1]);
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if (!IS_ERR_OR_NULL(platform->clk[2]))
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clk_put(platform->clk[2]);
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return -ENODEV;
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}
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static int gk20a_generic_probe(struct platform_device *dev)
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{
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gk20a_generic_get_clocks(dev);
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return 0;
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}
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static int gk20a_generic_late_probe(struct platform_device *dev)
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{
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struct gk20a_platform *platform = gk20a_get_platform(dev);
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/* Make gk20a power domain a subdomain of mc */
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tegra_pd_add_sd(&platform->g->pd);
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return 0;
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}
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struct gk20a_platform gk20a_generic_platform = {
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.railgate = gk20a_generic_railgate,
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.unrailgate = gk20a_generic_unrailgate,
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.is_railgated = gk20a_generic_is_railgated,
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.probe = gk20a_generic_probe,
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.late_probe = gk20a_generic_late_probe,
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};
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