mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 17:36:20 +03:00
Update the Linux specific code to match the MM API docs in the previous patch. The user passed page size is plumbed through the Linux VM mapping calls but is ultimately ignored once the core VM code is called. This will be handled in the next patch. This also adds some code to make the CDE page size picking happen semi-intelligently. In many cases the CDE buffers can be mapped with large pages. Bug 2011640 Change-Id: I20e78e7d5a841e410864b474179e71da1c2482f4 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1740610 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
425 lines
10 KiB
C
425 lines
10 KiB
C
/*
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* GK20A Address Spaces
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*
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* Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/cdev.h>
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#include <linux/uaccess.h>
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#include <linux/fs.h>
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#include <trace/events/gk20a.h>
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#include <uapi/linux/nvgpu.h>
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#include <nvgpu/gmmu.h>
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#include <nvgpu/vm_area.h>
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#include <nvgpu/log2.h>
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#include <nvgpu/linux/vm.h>
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#include "gk20a/gk20a.h"
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#include "platform_gk20a.h"
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#include "ioctl_as.h"
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#include "os_linux.h"
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static u32 gk20a_as_translate_as_alloc_space_flags(struct gk20a *g, u32 flags)
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{
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u32 core_flags = 0;
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if (flags & NVGPU_AS_ALLOC_SPACE_FLAGS_FIXED_OFFSET)
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core_flags |= NVGPU_VM_AREA_ALLOC_FIXED_OFFSET;
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if (flags & NVGPU_AS_ALLOC_SPACE_FLAGS_SPARSE)
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core_flags |= NVGPU_VM_AREA_ALLOC_SPARSE;
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return core_flags;
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}
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static int gk20a_as_ioctl_bind_channel(
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struct gk20a_as_share *as_share,
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struct nvgpu_as_bind_channel_args *args)
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{
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int err = 0;
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struct channel_gk20a *ch;
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struct gk20a *g = gk20a_from_vm(as_share->vm);
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nvgpu_log_fn(g, " ");
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ch = gk20a_get_channel_from_file(args->channel_fd);
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if (!ch)
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return -EINVAL;
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if (gk20a_channel_as_bound(ch)) {
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err = -EINVAL;
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goto out;
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}
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/* this will set channel_gk20a->vm */
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err = ch->g->ops.mm.vm_bind_channel(as_share->vm, ch);
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out:
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gk20a_channel_put(ch);
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return err;
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}
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static int gk20a_as_ioctl_alloc_space(
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struct gk20a_as_share *as_share,
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struct nvgpu_as_alloc_space_args *args)
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{
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struct gk20a *g = gk20a_from_vm(as_share->vm);
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nvgpu_log_fn(g, " ");
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return nvgpu_vm_area_alloc(as_share->vm, args->pages, args->page_size,
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&args->o_a.offset,
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gk20a_as_translate_as_alloc_space_flags(g,
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args->flags));
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}
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static int gk20a_as_ioctl_free_space(
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struct gk20a_as_share *as_share,
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struct nvgpu_as_free_space_args *args)
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{
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struct gk20a *g = gk20a_from_vm(as_share->vm);
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nvgpu_log_fn(g, " ");
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return nvgpu_vm_area_free(as_share->vm, args->offset);
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}
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static int gk20a_as_ioctl_map_buffer_ex(
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struct gk20a_as_share *as_share,
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struct nvgpu_as_map_buffer_ex_args *args)
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{
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struct gk20a *g = gk20a_from_vm(as_share->vm);
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nvgpu_log_fn(g, " ");
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/* unsupported, direct kind control must be used */
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if (!(args->flags & NVGPU_AS_MAP_BUFFER_FLAGS_DIRECT_KIND_CTRL)) {
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struct gk20a *g = as_share->vm->mm->g;
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nvgpu_log_info(g, "Direct kind control must be requested");
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return -EINVAL;
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}
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return nvgpu_vm_map_buffer(as_share->vm, args->dmabuf_fd,
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&args->offset, args->flags,
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args->page_size,
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args->compr_kind,
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args->incompr_kind,
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args->buffer_offset,
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args->mapping_size,
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NULL);
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}
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static int gk20a_as_ioctl_unmap_buffer(
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struct gk20a_as_share *as_share,
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struct nvgpu_as_unmap_buffer_args *args)
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{
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struct gk20a *g = gk20a_from_vm(as_share->vm);
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nvgpu_log_fn(g, " ");
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nvgpu_vm_unmap(as_share->vm, args->offset, NULL);
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return 0;
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}
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static int gk20a_as_ioctl_map_buffer_batch(
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struct gk20a_as_share *as_share,
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struct nvgpu_as_map_buffer_batch_args *args)
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{
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struct gk20a *g = gk20a_from_vm(as_share->vm);
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u32 i;
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int err = 0;
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struct nvgpu_as_unmap_buffer_args __user *user_unmap_args =
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(struct nvgpu_as_unmap_buffer_args __user *)(uintptr_t)
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args->unmaps;
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struct nvgpu_as_map_buffer_ex_args __user *user_map_args =
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(struct nvgpu_as_map_buffer_ex_args __user *)(uintptr_t)
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args->maps;
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struct vm_gk20a_mapping_batch batch;
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nvgpu_log_fn(g, " ");
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if (args->num_unmaps > NVGPU_IOCTL_AS_MAP_BUFFER_BATCH_LIMIT ||
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args->num_maps > NVGPU_IOCTL_AS_MAP_BUFFER_BATCH_LIMIT)
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return -EINVAL;
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nvgpu_vm_mapping_batch_start(&batch);
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for (i = 0; i < args->num_unmaps; ++i) {
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struct nvgpu_as_unmap_buffer_args unmap_args;
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if (copy_from_user(&unmap_args, &user_unmap_args[i],
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sizeof(unmap_args))) {
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err = -EFAULT;
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break;
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}
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nvgpu_vm_unmap(as_share->vm, unmap_args.offset, &batch);
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}
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if (err) {
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nvgpu_vm_mapping_batch_finish(as_share->vm, &batch);
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args->num_unmaps = i;
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args->num_maps = 0;
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return err;
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}
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for (i = 0; i < args->num_maps; ++i) {
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s16 compressible_kind;
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s16 incompressible_kind;
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struct nvgpu_as_map_buffer_ex_args map_args;
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memset(&map_args, 0, sizeof(map_args));
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if (copy_from_user(&map_args, &user_map_args[i],
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sizeof(map_args))) {
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err = -EFAULT;
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break;
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}
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if (map_args.flags &
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NVGPU_AS_MAP_BUFFER_FLAGS_DIRECT_KIND_CTRL) {
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compressible_kind = map_args.compr_kind;
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incompressible_kind = map_args.incompr_kind;
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} else {
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/* direct kind control must be used */
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err = -EINVAL;
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break;
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}
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err = nvgpu_vm_map_buffer(
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as_share->vm, map_args.dmabuf_fd,
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&map_args.offset, map_args.flags, map_args.page_size,
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compressible_kind, incompressible_kind,
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map_args.buffer_offset,
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map_args.mapping_size,
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&batch);
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if (err)
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break;
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}
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nvgpu_vm_mapping_batch_finish(as_share->vm, &batch);
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if (err)
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args->num_maps = i;
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/* note: args->num_unmaps will be unmodified, which is ok
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* since all unmaps are done */
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return err;
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}
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static int gk20a_as_ioctl_get_va_regions(
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struct gk20a_as_share *as_share,
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struct nvgpu_as_get_va_regions_args *args)
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{
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unsigned int i;
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unsigned int write_entries;
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struct nvgpu_as_va_region __user *user_region_ptr;
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struct vm_gk20a *vm = as_share->vm;
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struct gk20a *g = gk20a_from_vm(vm);
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unsigned int page_sizes = gmmu_page_size_kernel;
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nvgpu_log_fn(g, " ");
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if (!vm->big_pages)
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page_sizes--;
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write_entries = args->buf_size / sizeof(struct nvgpu_as_va_region);
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if (write_entries > page_sizes)
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write_entries = page_sizes;
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user_region_ptr =
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(struct nvgpu_as_va_region __user *)(uintptr_t)args->buf_addr;
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for (i = 0; i < write_entries; ++i) {
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struct nvgpu_as_va_region region;
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struct nvgpu_allocator *vma = vm->vma[i];
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memset(®ion, 0, sizeof(struct nvgpu_as_va_region));
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region.page_size = vm->gmmu_page_sizes[i];
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region.offset = nvgpu_alloc_base(vma);
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/* No __aeabi_uldivmod() on some platforms... */
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region.pages = (nvgpu_alloc_end(vma) -
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nvgpu_alloc_base(vma)) >> ilog2(region.page_size);
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if (copy_to_user(user_region_ptr + i, ®ion, sizeof(region)))
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return -EFAULT;
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}
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args->buf_size =
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page_sizes * sizeof(struct nvgpu_as_va_region);
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return 0;
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}
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static int nvgpu_as_ioctl_get_sync_ro_map(
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struct gk20a_as_share *as_share,
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struct nvgpu_as_get_sync_ro_map_args *args)
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{
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#ifdef CONFIG_TEGRA_GK20A_NVHOST
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struct vm_gk20a *vm = as_share->vm;
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struct gk20a *g = gk20a_from_vm(vm);
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u64 base_gpuva;
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u32 sync_size;
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int err = 0;
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if (!g->ops.fifo.get_sync_ro_map)
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return -EINVAL;
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if (!gk20a_platform_has_syncpoints(g))
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return -EINVAL;
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err = g->ops.fifo.get_sync_ro_map(vm, &base_gpuva, &sync_size);
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if (err)
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return err;
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args->base_gpuva = base_gpuva;
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args->sync_size = sync_size;
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return err;
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#else
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return -EINVAL;
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#endif
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}
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int gk20a_as_dev_open(struct inode *inode, struct file *filp)
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{
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struct nvgpu_os_linux *l;
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struct gk20a_as_share *as_share;
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struct gk20a *g;
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int err;
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l = container_of(inode->i_cdev, struct nvgpu_os_linux, as_dev.cdev);
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g = &l->g;
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nvgpu_log_fn(g, " ");
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err = gk20a_as_alloc_share(g, 0, 0, &as_share);
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if (err) {
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nvgpu_log_fn(g, "failed to alloc share");
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return err;
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}
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filp->private_data = as_share;
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return 0;
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}
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int gk20a_as_dev_release(struct inode *inode, struct file *filp)
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{
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struct gk20a_as_share *as_share = filp->private_data;
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if (!as_share)
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return 0;
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return gk20a_as_release_share(as_share);
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}
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long gk20a_as_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
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{
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int err = 0;
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struct gk20a_as_share *as_share = filp->private_data;
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struct gk20a *g = gk20a_from_as(as_share->as);
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u8 buf[NVGPU_AS_IOCTL_MAX_ARG_SIZE];
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nvgpu_log_fn(g, "start %d", _IOC_NR(cmd));
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if ((_IOC_TYPE(cmd) != NVGPU_AS_IOCTL_MAGIC) ||
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(_IOC_NR(cmd) == 0) ||
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(_IOC_NR(cmd) > NVGPU_AS_IOCTL_LAST) ||
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(_IOC_SIZE(cmd) > NVGPU_AS_IOCTL_MAX_ARG_SIZE))
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return -EINVAL;
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memset(buf, 0, sizeof(buf));
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if (_IOC_DIR(cmd) & _IOC_WRITE) {
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if (copy_from_user(buf, (void __user *)arg, _IOC_SIZE(cmd)))
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return -EFAULT;
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}
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err = gk20a_busy(g);
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if (err)
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return err;
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switch (cmd) {
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case NVGPU_AS_IOCTL_BIND_CHANNEL:
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trace_gk20a_as_ioctl_bind_channel(g->name);
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err = gk20a_as_ioctl_bind_channel(as_share,
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(struct nvgpu_as_bind_channel_args *)buf);
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break;
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case NVGPU32_AS_IOCTL_ALLOC_SPACE:
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{
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struct nvgpu32_as_alloc_space_args *args32 =
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(struct nvgpu32_as_alloc_space_args *)buf;
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struct nvgpu_as_alloc_space_args args;
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args.pages = args32->pages;
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args.page_size = args32->page_size;
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args.flags = args32->flags;
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args.o_a.offset = args32->o_a.offset;
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trace_gk20a_as_ioctl_alloc_space(g->name);
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err = gk20a_as_ioctl_alloc_space(as_share, &args);
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args32->o_a.offset = args.o_a.offset;
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break;
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}
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case NVGPU_AS_IOCTL_ALLOC_SPACE:
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trace_gk20a_as_ioctl_alloc_space(g->name);
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err = gk20a_as_ioctl_alloc_space(as_share,
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(struct nvgpu_as_alloc_space_args *)buf);
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break;
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case NVGPU_AS_IOCTL_FREE_SPACE:
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trace_gk20a_as_ioctl_free_space(g->name);
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err = gk20a_as_ioctl_free_space(as_share,
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(struct nvgpu_as_free_space_args *)buf);
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break;
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case NVGPU_AS_IOCTL_MAP_BUFFER_EX:
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trace_gk20a_as_ioctl_map_buffer(g->name);
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err = gk20a_as_ioctl_map_buffer_ex(as_share,
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(struct nvgpu_as_map_buffer_ex_args *)buf);
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break;
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case NVGPU_AS_IOCTL_UNMAP_BUFFER:
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trace_gk20a_as_ioctl_unmap_buffer(g->name);
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err = gk20a_as_ioctl_unmap_buffer(as_share,
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(struct nvgpu_as_unmap_buffer_args *)buf);
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break;
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case NVGPU_AS_IOCTL_GET_VA_REGIONS:
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trace_gk20a_as_ioctl_get_va_regions(g->name);
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err = gk20a_as_ioctl_get_va_regions(as_share,
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(struct nvgpu_as_get_va_regions_args *)buf);
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break;
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case NVGPU_AS_IOCTL_MAP_BUFFER_BATCH:
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err = gk20a_as_ioctl_map_buffer_batch(as_share,
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(struct nvgpu_as_map_buffer_batch_args *)buf);
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break;
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case NVGPU_AS_IOCTL_GET_SYNC_RO_MAP:
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err = nvgpu_as_ioctl_get_sync_ro_map(as_share,
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(struct nvgpu_as_get_sync_ro_map_args *)buf);
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break;
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default:
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err = -ENOTTY;
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break;
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}
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gk20a_idle(g);
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if ((err == 0) && (_IOC_DIR(cmd) & _IOC_READ))
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if (copy_to_user((void __user *)arg, buf, _IOC_SIZE(cmd)))
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err = -EFAULT;
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return err;
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}
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