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git://nv-tegra.nvidia.com/linux-nvgpu.git
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f9cac0c64d
Remove all nvgpu_next files and move the code into corresponding nvgpu files. Merge nvgpu-next-*.yaml into nvgpu-.yaml files. Jira NVGPU-4771 Change-Id: I595311be3c7bbb4f6314811e68712ff01763801e Signed-off-by: Antony Clince Alex <aalex@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2547557 Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
88 lines
2.1 KiB
C
88 lines
2.1 KiB
C
/*
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* Copyright (c) 2020-2021 NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/class.h>
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#include <nvgpu/barrier.h>
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#include "hal/class/class_tu104.h"
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#include "class_ga10b.h"
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bool ga10b_class_is_valid(u32 class_num)
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{
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bool valid;
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nvgpu_speculation_barrier();
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switch (class_num) {
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case AMPERE_SMC_PARTITION_REF:
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case AMPERE_COMPUTE_B:
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case AMPERE_DMA_COPY_B:
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case AMPERE_CHANNEL_GPFIFO_B:
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#ifdef CONFIG_NVGPU_GRAPHICS
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case AMPERE_B:
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#endif
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valid = true;
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break;
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default:
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valid = tu104_class_is_valid(class_num);
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break;
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}
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return valid;
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};
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#ifdef CONFIG_NVGPU_GRAPHICS
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bool ga10b_class_is_valid_gfx(u32 class_num)
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{
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bool valid;
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nvgpu_speculation_barrier();
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switch (class_num) {
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case AMPERE_B:
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valid = true;
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break;
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default:
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valid = tu104_class_is_valid_gfx(class_num);
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break;
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}
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return valid;
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}
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#endif
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bool ga10b_class_is_valid_compute(u32 class_num)
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{
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bool valid;
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nvgpu_speculation_barrier();
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switch (class_num) {
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case AMPERE_COMPUTE_B:
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valid = true;
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break;
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default:
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valid = tu104_class_is_valid_compute(class_num);
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break;
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}
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return valid;
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}
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