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2f1d251d79
Doxygen requires a space between in/out qualifiers and the parameter name. This patch fixes 500+ occurences of the issue. JIRA NVGPU-4120 Change-Id: Iaa3a7c69e1bed9b528796b669e11a2f13aa63301 Signed-off-by: Nicolas Benech <nbenech@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2219641 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
76 lines
2.8 KiB
C
76 lines
2.8 KiB
C
/*
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* Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_PREEMPT_H
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#define NVGPU_PREEMPT_H
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#include <nvgpu/types.h>
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/**
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* @file
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*
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* Preemption interface.
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*/
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struct gk20a;
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struct nvgpu_channel;
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struct nvgpu_tsg;
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/**
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* @brief Get preemption timeout (ms). This timeout is defined by s/w.
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*
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* @param g [in] The GPU driver struct to query preempt timeout for.
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*
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* @return Maximum amount of time in ms to wait for preemption completion,
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* i.e. context non resident on PBDMAs and engines.
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*/
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u32 nvgpu_preempt_get_timeout(struct gk20a *g);
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/**
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* @brief Preempts TSG if channel is bound to TSG.
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*
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* @param g [in] The GPU driver struct which owns this channel.
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* @param ch [in] Pointer to channel to be preempted.
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*
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* Preempts TSG if channel is bound to TSG. Preemption implies that the
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* context's state is saved out and also that the context cannot remain parked
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* either in Host or in any engine.
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*
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* After triggering a preempt request for channel's TSG, pbdmas and engines
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* are polled to make sure preemption completed, i.e. context is not loaded
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* on any pbdma or engine.
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*
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* @return 0 in case of success, <0 in case of failure
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* @retval 0 if channel was not bound to TSG.
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* @retval 0 if TSG was not loaded on pbdma or engine.
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* @retval 0 if TSG was loaded (pbdma or engine) and could be preempted.
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* @retval non-zero value if preemption did not complete within s/w defined
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* timeout.
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*/
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int nvgpu_preempt_channel(struct gk20a *g, struct nvgpu_channel *ch);
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/**
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* Called from recovery handling for volta onwards. This will
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* not be part of safety build after recovery is not supported in safety build.
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*/
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void nvgpu_preempt_poll_tsg_on_pbdma(struct gk20a *g,
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struct nvgpu_tsg *tsg);
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#endif /* NVGPU_PREEMPT_H */
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