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913a2d519f
CBC base and top values need to be left shifted by cbc_alignment factor to store in the CBC_BASE and CBC_TOP registers respectively. Fix cbc calculations accordingly. Update cbc information debug prints to print with gpu_dbg_info flag. Bug 3353418 Change-Id: I858c46a9dab1e5f810cabb327ba1797f15a2960e Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2574119 Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Tested-by: Bitan Biswas <bbiswas@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>