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Issue observed: - In GA10B, it was observed that after recovery happens ELPG does not engage. - It was because, after CE reset, when nvgpu_submit_twod test was run to engage ELPG, IDLE_FLIPPED_PWR_OFF signal was asserted. - This means that when ELPG was engaged (engine is in PWR_OFF), some idle signal flips (becomes non-idle) and this causes IDLE_SNAP. After IDLE_SNAP is hit, ELPG will not engage further. - After debugging from WAVES, it was observed that: LCE0/LCE1 are not done with the reset sequence. - The state of these LCE is RESET0. A pri request (pri read to NV_CE_PCE_MAP register in CE) is seen that kicks it out of RESET0. After this state, it goes through few states to update some internal states (states RESET1/RESET2/PCE_MAP etc) and then eventually settles down to IDLE state. Solution: - Read ce_pce_map_r register in recovery sequence (after ce reset). - It is observed that when this read is added recovery is complete and post that when nvgpu_submit_two test is executed, ELPG is engaging. - This means that a pri read is needed after CE reset so that it settles to idle state properly and post that ELPG can engage properly. Bug 200734258 Change-Id: I5bb84921ca62a740fde81ffe6c29ccde4ebb341b Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2554493 Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
36 lines
1.5 KiB
C
36 lines
1.5 KiB
C
/*
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* Ampere GPU series copy engine
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*
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* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_CE_GA10B_H
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#define NVGPU_CE_GA10B_H
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struct gk20a;
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void ga10b_ce_init_hw(struct gk20a *g);
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void ga10b_ce_intr_enable(struct gk20a *g, bool enable);
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void ga10b_ce_stall_isr(struct gk20a *g, u32 inst_id, u32 pri_base);
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void ga10b_ce_intr_retrigger(struct gk20a *g, u32 inst_id);
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void ga10b_ce_request_idle(struct gk20a *g);
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#endif /* NVGPU_CE_GA10B_H */
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