Files
linux-nvgpu/drivers/gpu/nvgpu/hal/perf/perf_gv11b.h
Deepak Nibade 9221b01968 gpu: nvgpu: implement HWPM streamout teardown sequence
Implement below functions:

- nvgpu_profiler_quiesce_hwpm_streamout_resident
Teardown sequence when context is resident or in case profiling
session is a device level session.

- nvgpu_profiler_quiesce_hwpm_streamout_non_resident
Teardown sequence when context is non resident

- nvgpu_profiler_quiesce_hwpm_streamout
Generic sequence to call either of above API based on whether
context is resident or not.

Trigger HWPM streamout teardown sequence while unbinding resources
in nvgpu_profiler_unbind_hwpm_streamout()

Add a new HAL gops.gr.is_tsg_ctx_resident to call
gk20a_is_tsg_ctx_resident() from common code.

Implement below supporting HALs for resident teardown sequence:
- gops.perf.pma_stream_enable()
- gops.perf.disable_all_perfmons()
- gops.perf.wait_for_idle_pmm_routers()
- gops.perf.wait_for_idle_pma()
- gops.gr.disable_cau()
- gops.gr.disable_smpc()

Jira NVGPU-5360

Change-Id: I304ea25d296fae0146937b15228ea21edc091e16
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2461333
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-18 15:26:21 -08:00

73 lines
2.9 KiB
C

/*
* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
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* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_GV11B_PERF
#define NVGPU_GV11B_PERF
#ifdef CONFIG_NVGPU_DEBUGGER
#include <nvgpu/types.h>
struct gk20a;
struct nvgpu_mem;
bool gv11b_perf_get_membuf_overflow_status(struct gk20a *g);
u32 gv11b_perf_get_membuf_pending_bytes(struct gk20a *g);
void gv11b_perf_set_membuf_handled_bytes(struct gk20a *g,
u32 entries, u32 entry_size);
void gv11b_perf_membuf_reset_streaming(struct gk20a *g);
void gv11b_perf_enable_membuf(struct gk20a *g, u32 size, u64 buf_addr);
void gv11b_perf_disable_membuf(struct gk20a *g);
void gv11b_perf_bind_mem_bytes_buffer_addr(struct gk20a *g, u64 buf_addr);
int gv11b_perf_update_get_put(struct gk20a *g, u64 bytes_consumed, bool update_available_bytes,
u64 *put_ptr, bool *overflowed);
void gv11b_perf_init_inst_block(struct gk20a *g, struct nvgpu_mem *inst_block);
void gv11b_perf_deinit_inst_block(struct gk20a *g);
u32 gv11b_perf_get_pmmsys_per_chiplet_offset(void);
u32 gv11b_perf_get_pmmgpc_per_chiplet_offset(void);
u32 gv11b_perf_get_pmmfbp_per_chiplet_offset(void);
const u32 *gv11b_perf_get_hwpm_sys_perfmon_regs(u32 *count);
const u32 *gv11b_perf_get_hwpm_gpc_perfmon_regs(u32 *count);
const u32 *gv11b_perf_get_hwpm_fbp_perfmon_regs(u32 *count);
void gv11b_perf_set_pmm_register(struct gk20a *g, u32 offset, u32 val,
u32 num_chiplets, u32 chiplet_stride, u32 num_perfmons);
void gv11b_perf_get_num_hwpm_perfmon(struct gk20a *g, u32 *num_sys_perfmon,
u32 *num_fbp_perfmon, u32 *num_gpc_perfmon);
void gv11b_perf_reset_hwpm_pmm_registers(struct gk20a *g);
void gv11b_perf_init_hwpm_pmm_register(struct gk20a *g);
void gv11b_perf_pma_stream_enable(struct gk20a *g, bool enable);
void gv11b_perf_disable_all_perfmons(struct gk20a *g);
int gv11b_perf_wait_for_idle_pmm_routers(struct gk20a *g);
int gv11b_perf_wait_for_idle_pma(struct gk20a *g);
#endif /* CONFIG_NVGPU_DEBUGGER */
#endif