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git://nv-tegra.nvidia.com/linux-nvgpu.git
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700bd83b41
-Removed unwanded boardobj includes -Renamed functions as struct as per usage NVGPU-4484 Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com> Change-Id: I792a4b64075d5e87f911c1073717dbe7107227a1 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2335991 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
109 lines
3.8 KiB
C
109 lines
3.8 KiB
C
/*
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* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_PMU_CMD_H
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#define NVGPU_PMU_CMD_H
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#include <nvgpu/flcnif_cmn.h>
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#include <nvgpu/pmu/pmuif/perfmon.h>
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#include <nvgpu/pmu/pmuif/pg.h>
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#include <nvgpu/pmu/pmuif/acr.h>
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#include <nvgpu/pmu/pmuif/pmgr.h>
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#include <nvgpu/pmu/pmuif/rpc.h>
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struct gk20a;
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struct pmu_payload;
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struct nvgpu_pmu;
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struct pmu_msg;
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struct pmu_sequence;
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struct falcon_payload_alloc;
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typedef void (*pmu_callback)(struct gk20a *g, struct pmu_msg *msg, void *param,
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u32 status);
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struct pmu_cmd {
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struct pmu_hdr hdr;
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union {
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struct pmu_perfmon_cmd perfmon;
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struct pmu_pg_cmd pg;
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struct pmu_zbc_cmd zbc;
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struct pmu_acr_cmd acr;
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struct nv_pmu_boardobj_cmd obj;
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struct nv_pmu_pmgr_cmd pmgr;
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struct nv_pmu_rpc_cmd rpc;
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} cmd;
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};
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/* send a cmd to pmu */
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int nvgpu_pmu_cmd_post(struct gk20a *g, struct pmu_cmd *cmd,
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struct pmu_payload *payload,
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u32 queue_id, pmu_callback callback, void *cb_param);
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/* PMU RPC */
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int nvgpu_pmu_rpc_execute(struct nvgpu_pmu *pmu, struct nv_pmu_rpc_header *rpc,
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u16 size_rpc, u16 size_scratch, pmu_callback caller_cb,
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void *caller_cb_param, bool is_copy_back);
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/* RPC */
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#define PMU_RPC_EXECUTE(_stat, _pmu, _unit, _func, _prpc, _size)\
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do { \
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(void) memset(&((_prpc)->hdr), 0, sizeof((_prpc)->hdr));\
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\
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(_prpc)->hdr.unit_id = PMU_UNIT_##_unit; \
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(_prpc)->hdr.function = NV_PMU_RPC_ID_##_unit##_##_func;\
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(_prpc)->hdr.flags = 0x0; \
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\
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_stat = nvgpu_pmu_rpc_execute(_pmu, &((_prpc)->hdr), \
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(u16)(sizeof(*(_prpc)) - sizeof((_prpc)->scratch)), \
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(_size), NULL, NULL, false); \
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} while (false)
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/* RPC blocking call to copy back data from PMU to _prpc */
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#define PMU_RPC_EXECUTE_CPB(_stat, _pmu, _unit, _func, _prpc, _size)\
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do { \
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(void) memset(&((_prpc)->hdr), 0, sizeof((_prpc)->hdr));\
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\
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(_prpc)->hdr.unit_id = PMU_UNIT_##_unit; \
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(_prpc)->hdr.function = NV_PMU_RPC_ID_##_unit##_##_func;\
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(_prpc)->hdr.flags = 0x0; \
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\
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_stat = nvgpu_pmu_rpc_execute(_pmu, &((_prpc)->hdr), \
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(u16)(sizeof(*(_prpc)) - sizeof((_prpc)->scratch)),\
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(_size), NULL, NULL, true); \
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} while (false)
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/* RPC non-blocking with call_back handler option */
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#define PMU_RPC_EXECUTE_CB(_stat, _pmu, _unit, _func, _prpc, _size, _cb, _cbp)\
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do { \
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(void) memset(&((_prpc)->hdr), 0, sizeof((_prpc)->hdr));\
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\
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(_prpc)->hdr.unit_id = PMU_UNIT_##_unit; \
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(_prpc)->hdr.function = NV_PMU_RPC_ID_##_unit##_##_func;\
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(_prpc)->hdr.flags = 0x0; \
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\
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_stat = nvgpu_pmu_rpc_execute(_pmu, &((_prpc)->hdr), \
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(sizeof(*(_prpc)) - sizeof((_prpc)->scratch)),\
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(_size), _cb, _cbp, false); \
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} while (false)
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#endif /* NVGPU_PMU_CMD_H*/
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