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git://nv-tegra.nvidia.com/linux-nvgpu.git
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Historically, nvgpu has supported a struct gk20a_dmabuf_priv and associated it with a dmabuf instance. This was aided by Nvmap's dma_buf_set_drv_data() and dma_buf_get_drvdata() APIs. gk20a_dmabuf_priv is used to store Comptag IDs i.e. (1 per 64 kb) as well as can store the dmabuf attachments to avoid multiple attach/detach calls. dma_buf_set_drv_data() allows Nvgpu to associate an instance of struct gk20a_dmabuf_priv with the instance of the dmabuf and also provide a release callback to delete the instance when the last reference to the dmabuf is put. Nvmap accomplishes this by modifying the struct dma_buf_ops definition to include the set_drv_data and get_drv_data callbacks in the kernel code. The above approach won't work for upstream Kstable and Nvmap plans to remove these APIs for upcoming newer downstream kernels as well. In order to implement the same functionality without depending on Nvmap, Nvgpu will implement a release chaining mechanism. Dmabuf's 'ops' pointer points to a constant struct and hence a whole copy of the ops is made followed by altering the new copy's release pointer. struct gk20a_dmabuf_priv stores the new copy and the dmabuf's 'ops' is changed to point to this. This allows Nvgpu to retrieve the corresponding gk20a_dmabuf_priv instance using container_of. Nvgpu's custom release callback will invoke the original release callback of the dmabuf's producer as a last step, thus completing the full circle. In case, the driver is removed, Nvgpu restores the dmabuf's 'ops' back to the original state. In order to accomplish this, every instance of a struct nvgpu_os_linux maintains a linkedlist of the gk20a_dma_buf instances. During the driver removal, this linkedlist is traversed and the corresponding dmabuf's 'ops' pointer is put back to its original state followed by freeing of this instance. Nvgpu is a producer of dmabuf's for vidmem and needs a way to check whether the given dmabuf belongs to itself. Its no longer reliable to depend on a comparision of the 'ops' pointer. Instead dmabuf_export_info() allows a name to be set by the exporter and this can be used to compare with a memory location that belongs to Nvgpu. Similarly for sysmem dmabufs, Nvmap makes a similar change in the way it identifies whether a dmabuf belongs to itself. Removed NVGPU_DMABUF_HAS_DRVDATA and moved to a unified mechanism for both downstream as well as upstream kernel. Some of the other changes in this file include the following. 1) Deletion of dmabuf.c and moving its contents over to dmabuf_priv.c 2) Replacing gk20a_mm_pin_has_drvdata with nvgpu_mm_pin_privdata and vice-versa for unpin. Bug 2878569 Change-Id: Icf8e79b05a25ad5a85f478c3ee0fc1eb7747e22d Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2341001 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: Puneet Saxena <puneets@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
345 lines
8.5 KiB
C
345 lines
8.5 KiB
C
/*
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* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/device.h>
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#include <linux/dma-buf.h>
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#include <linux/scatterlist.h>
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#include <nvgpu/comptags.h>
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#include <nvgpu/enabled.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/linux/vm.h>
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#include <nvgpu/bug.h>
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#include <nvgpu/fence.h>
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#include <nvgpu/vm.h>
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#include "platform_gk20a.h"
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#include "dmabuf_priv.h"
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#include "os_linux.h"
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#include "dmabuf_vidmem.h"
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void gk20a_mm_delete_priv(struct gk20a_dmabuf_priv *priv);
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enum nvgpu_aperture gk20a_dmabuf_aperture(struct gk20a *g,
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struct dma_buf *dmabuf)
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{
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#ifdef CONFIG_NVGPU_DGPU
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struct gk20a *buf_owner = nvgpu_vidmem_buf_owner(dmabuf);
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bool unified_memory = nvgpu_is_enabled(g, NVGPU_MM_UNIFIED_MEMORY);
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if (buf_owner == NULL) {
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/* Not nvgpu-allocated, assume system memory */
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return APERTURE_SYSMEM;
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} else if ((buf_owner == g) && unified_memory) {
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/* Looks like our video memory, but this gpu doesn't support
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* it. Warn about a bug and bail out */
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nvgpu_do_assert_print(g,
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"dmabuf is our vidmem but we don't have local vidmem");
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return APERTURE_INVALID;
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} else if (buf_owner != g) {
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/* Someone else's vidmem */
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return APERTURE_INVALID;
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} else {
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/* Yay, buf_owner == g */
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return APERTURE_VIDMEM;
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}
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#else
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return APERTURE_SYSMEM;
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#endif
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}
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static struct gk20a_dmabuf_priv *dma_buf_ops_to_gk20a_priv(
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struct dma_buf_ops *ops)
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{
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struct gk20a_dmabuf_priv *priv = container_of(ops,
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struct gk20a_dmabuf_priv, local_ops);
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return priv;
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}
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static void nvgpu_dma_buf_release(struct dma_buf *dmabuf)
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{
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struct gk20a_dmabuf_priv *priv = NULL;
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struct nvgpu_os_linux *l = NULL;
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priv = dma_buf_ops_to_gk20a_priv((struct dma_buf_ops *)dmabuf->ops);
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if (priv != NULL) {
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l = nvgpu_os_linux_from_gk20a(priv->g);
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} else {
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BUG();
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return;
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}
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/* remove this entry from the global tracking list */
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nvgpu_mutex_acquire(&l->dmabuf_priv_list_lock);
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gk20a_mm_delete_priv(priv);
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nvgpu_mutex_release(&l->dmabuf_priv_list_lock);
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dmabuf->ops->release(dmabuf);
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}
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int gk20a_dma_buf_set_drvdata(struct dma_buf *dmabuf, struct device *device,
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struct gk20a_dmabuf_priv *priv)
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{
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nvgpu_mutex_acquire(&priv->lock);
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priv->dmabuf = dmabuf;
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mutex_lock(&dmabuf->lock);
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priv->previous_ops = dmabuf->ops;
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/*
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* Make a copy of the original ops struct and then update the
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* release pointer
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*/
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priv->local_ops = *(dmabuf->ops);
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priv->local_ops.release = nvgpu_dma_buf_release;
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dmabuf->ops = &priv->local_ops;
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mutex_unlock(&dmabuf->lock);
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nvgpu_mutex_release(&priv->lock);
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return 0;
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}
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static struct gk20a_dmabuf_priv *gk20a_dmabuf_priv_from_list(
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struct nvgpu_list_node *node)
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{
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return container_of(node, struct gk20a_dmabuf_priv, list);
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}
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struct gk20a_dmabuf_priv *gk20a_dma_buf_get_drvdata(
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struct dma_buf *dmabuf, struct device *device)
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{
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struct gk20a_dmabuf_priv *priv = NULL;
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mutex_lock(&dmabuf->lock);
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if (dmabuf->ops->release == nvgpu_dma_buf_release) {
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priv = dma_buf_ops_to_gk20a_priv((struct dma_buf_ops *)dmabuf->ops);
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}
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mutex_unlock(&dmabuf->lock);
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return priv;
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}
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struct sg_table *nvgpu_mm_pin_privdata(struct device *dev,
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struct dma_buf *dmabuf, struct dma_buf_attachment **attachment)
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{
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struct gk20a *g = get_gk20a(dev);
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struct gk20a_dmabuf_priv *priv = NULL;
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priv = gk20a_dma_buf_get_drvdata(dmabuf, dev);
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if (!priv) {
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nvgpu_do_assert();
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return ERR_PTR(-EINVAL);
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}
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nvgpu_mutex_acquire(&priv->lock);
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if (priv->pin_count == 0) {
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priv->attach = dma_buf_attach(dmabuf, dev);
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if (IS_ERR(priv->attach)) {
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nvgpu_mutex_release(&priv->lock);
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nvgpu_err(g, "Failed to attach dma_buf (err = %ld)!",
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PTR_ERR(priv->attach));
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return ERR_CAST(priv->attach);
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}
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priv->sgt = dma_buf_map_attachment(priv->attach,
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DMA_BIDIRECTIONAL);
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if (IS_ERR(priv->sgt)) {
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dma_buf_detach(dmabuf, priv->attach);
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nvgpu_mutex_release(&priv->lock);
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nvgpu_err(g, "Failed to map attachment (err = %ld)!",
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PTR_ERR(priv->sgt));
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return ERR_CAST(priv->sgt);
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}
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}
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priv->pin_count++;
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nvgpu_mutex_release(&priv->lock);
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*attachment = priv->attach;
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return priv->sgt;
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}
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void nvgpu_mm_unpin_privdata(struct device *dev,
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struct dma_buf *dmabuf,
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struct dma_buf_attachment *attachment,
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struct sg_table *sgt)
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{
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struct gk20a_dmabuf_priv *priv = gk20a_dma_buf_get_drvdata(dmabuf, dev);
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dma_addr_t dma_addr;
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if (IS_ERR(priv) || !priv)
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return;
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nvgpu_mutex_acquire(&priv->lock);
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nvgpu_assert(priv->sgt == sgt);
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nvgpu_assert(priv->attach == attachment);
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priv->pin_count--;
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nvgpu_assert(priv->pin_count >= 0);
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dma_addr = sg_dma_address(priv->sgt->sgl);
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if (priv->pin_count == 0) {
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dma_buf_unmap_attachment(priv->attach, priv->sgt,
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DMA_BIDIRECTIONAL);
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dma_buf_detach(dmabuf, priv->attach);
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}
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nvgpu_mutex_release(&priv->lock);
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}
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/* This function must be called after acquiring the global level
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* dmabuf_priv_list_lock.
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*/
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void gk20a_mm_delete_priv(struct gk20a_dmabuf_priv *priv)
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{
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struct gk20a_buffer_state *s, *s_tmp;
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struct gk20a *g;
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struct dma_buf *dmabuf;
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if (!priv)
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return;
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g = priv->g;
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dmabuf = priv->dmabuf;
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if (priv->comptags.allocated && priv->comptags.lines) {
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WARN_ON(!priv->comptag_allocator);
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gk20a_comptaglines_free(priv->comptag_allocator,
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priv->comptags.offset,
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priv->comptags.lines);
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}
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/* Free buffer states */
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nvgpu_list_for_each_entry_safe(s, s_tmp, &priv->states,
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gk20a_buffer_state, list) {
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nvgpu_fence_put(s->fence);
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nvgpu_list_del(&s->list);
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nvgpu_kfree(g, s);
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}
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/* The original pointer to dma_buf_ops is always put back here*/
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mutex_lock(&dmabuf->lock);
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dmabuf->ops = priv->previous_ops;
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mutex_unlock(&dmabuf->lock);
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/* Remove this entry from the global tracking list */
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nvgpu_list_del(&priv->list);
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nvgpu_kfree(g, priv);
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}
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void gk20a_dma_buf_priv_list_clear(struct nvgpu_os_linux *l)
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{
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struct gk20a_dmabuf_priv *priv, *priv_next;
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nvgpu_mutex_acquire(&l->dmabuf_priv_list_lock);
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nvgpu_list_for_each_entry_safe(priv, priv_next, &l->dmabuf_priv_list,
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gk20a_dmabuf_priv, list) {
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gk20a_mm_delete_priv(priv);
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}
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nvgpu_mutex_release(&l->dmabuf_priv_list_lock);
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}
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int gk20a_dmabuf_alloc_drvdata(struct dma_buf *dmabuf, struct device *dev)
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{
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struct gk20a *g = gk20a_get_platform(dev)->g;
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struct gk20a_dmabuf_priv *priv;
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struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
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priv = gk20a_dma_buf_get_drvdata(dmabuf, dev);
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if (likely(priv))
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return 0;
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nvgpu_mutex_acquire(&g->mm.priv_lock);
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priv = gk20a_dma_buf_get_drvdata(dmabuf, dev);
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if (priv)
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goto priv_exist_or_err;
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priv = nvgpu_kzalloc(g, sizeof(*priv));
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if (!priv) {
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priv = ERR_PTR(-ENOMEM);
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goto priv_exist_or_err;
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}
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nvgpu_mutex_init(&priv->lock);
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nvgpu_init_list_node(&priv->states);
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priv->g = g;
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gk20a_dma_buf_set_drvdata(dmabuf, dev, priv);
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nvgpu_init_list_node(&priv->list);
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/* Append this priv to the global tracker */
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nvgpu_mutex_acquire(&l->dmabuf_priv_list_lock);
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nvgpu_list_add_tail(&l->dmabuf_priv_list, &priv->list);
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nvgpu_mutex_release(&l->dmabuf_priv_list_lock);
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priv_exist_or_err:
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nvgpu_mutex_release(&g->mm.priv_lock);
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if (IS_ERR(priv))
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return -ENOMEM;
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return 0;
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}
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int gk20a_dmabuf_get_state(struct dma_buf *dmabuf, struct gk20a *g,
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u64 offset, struct gk20a_buffer_state **state)
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{
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int err = 0;
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struct gk20a_dmabuf_priv *priv;
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struct gk20a_buffer_state *s;
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struct device *dev = dev_from_gk20a(g);
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if (offset >= (u64)dmabuf->size) {
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nvgpu_do_assert();
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return -EINVAL;
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}
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err = gk20a_dmabuf_alloc_drvdata(dmabuf, dev);
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if (err)
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return err;
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priv = gk20a_dma_buf_get_drvdata(dmabuf, dev);
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if (!priv) {
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nvgpu_do_assert();
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return -ENOSYS;
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}
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nvgpu_mutex_acquire(&priv->lock);
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nvgpu_list_for_each_entry(s, &priv->states, gk20a_buffer_state, list)
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if (s->offset == offset)
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goto out;
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/* State not found, create state. */
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s = nvgpu_kzalloc(g, sizeof(*s));
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if (!s) {
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err = -ENOMEM;
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goto out;
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}
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s->offset = offset;
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nvgpu_init_list_node(&s->list);
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nvgpu_mutex_init(&s->lock);
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nvgpu_list_add_tail(&s->list, &priv->states);
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out:
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nvgpu_mutex_release(&priv->lock);
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if (!err)
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*state = s;
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return err;
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}
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