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730ba218c1
This patch adds kernel interface for dynamic TPC-PG feature. User-space needs to send TPC-PG args to kernel via ioctl. Dynamic TPC-PG feature will allow every context to specify the number of TPC's it will use to run its workload. This way, graphics driver can power off non-required TPC's if a particular context has light to medium workload. JIRA GPUT19x-16 Change-Id: Id4846245a6414b719599d04784cbe2ca5282f4ad Signed-off-by: Deepak Goyal <dgoyal@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1575848 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
60 lines
1.8 KiB
C
60 lines
1.8 KiB
C
/*
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* NVGPU Public Interface Header
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*
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* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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/* This file is meant to extend nvgpu.h, not replace it
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* as such, be sure that nvgpu.h is actually the file performing the
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* inclusion, to the extent that's possible.
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*/
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#ifndef _UAPI__LINUX_NVGPU_IOCTL_H
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# error "This file is to be included within nvgpu.h only."
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#endif
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#ifndef _UAPI__LINUX_NVGPU_T19X_IOCTL_H_
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#define _UAPI__LINUX_NVGPU_T19X_IOCTL_H_
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#define NVGPU_GPU_ARCH_GV110 0x00000150
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#define NVGPU_GPU_ARCH_GV100 0x00000140
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#define NVGPU_GPU_IMPL_GV11B 0x0000000B
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#define NVGPU_GPU_IMPL_GV100 0x00000000
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/*
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* this flag is used in struct nvgpu_as_map_buffer_ex_args
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* to provide L3 cache allocation hint
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*/
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#define NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC (1 << 7)
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/* subcontexts are available */
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#define NVGPU_GPU_FLAGS_SUPPORT_TSG_SUBCONTEXTS (1ULL << 22)
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struct nvgpu_tsg_bind_channel_ex_args {
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/* in: channel fd */
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__s32 channel_fd;
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/* in: VEID in Volta */
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__u32 subcontext_id;
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__u32 num_active_tpcs;
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__u8 tpc_pg_enabled;
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__u8 reserved[11];
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};
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#define NVGPU_TSG_IOCTL_BIND_CHANNEL_EX \
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_IOWR(NVGPU_TSG_IOCTL_MAGIC, 11, struct nvgpu_tsg_bind_channel_ex_args)
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#define NVGPU_TSG_IOCTL_MAX NVGPU_TSG_IOCTL_BIND_CHANNEL_EX
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#define NVGPU_TSG_IOCTL_MAX_ARG sizeof(struct nvgpu_tsg_bind_channel_ex_args)
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#endif /* _UAPI__LINUX_NVGPU_T19X_IOCTL_H_ */
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