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72e5be2690
- Add Doxygen documentation for soc. - Add CONFIG_NVGPU_NON_FUSA flag for nvgpu_us_counter. Jira NVGPU-4147 Change-Id: Ie0a9879a4bf681411f0efe16590370e12f7c3b70 Signed-off-by: Prateek sethi <prsethi@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2215155 Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
142 lines
4.3 KiB
C
142 lines
4.3 KiB
C
/*
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* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_SOC_H
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#define NVGPU_SOC_H
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#include <nvgpu/types.h>
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struct gk20a;
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/**
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* @brief Check whether running on silicon or not.
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*
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* @param g[in] GPU super structure.
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*
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* - Extract out platform info by calling NvTegraSysGetPlatform().
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* - If info is NULL return false.
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* - If info is not "silicon" then return false. Otherwise return true.
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*
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* @return Returns true if it's silicon else return false.
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*/
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bool nvgpu_platform_is_silicon(struct gk20a *g);
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/**
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* @brief Check whether running simulation or not.
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*
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* @param g[in] GPU super structure.
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*
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* - Read CPU type by calling NvTegraSysGetCpuType().
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* - Read platform info by calling NvTegraSysGetPlatform().
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* - If any of above two or both are NULL return false.
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* - True if any/all of the below condition is true.
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* - CPU type is "vdk" or
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* - CPU type is "dsim" or
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* - CPU type is "asim" or
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* - platform info is "quickturn".
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* @return Returns true if it's simulation else returns false.
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*/
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bool nvgpu_platform_is_simulation(struct gk20a *g);
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/**
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* @brief Check whether running fpga or not.
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*
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* @param g[in] GPU super structure.
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*
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* - Get tegra Platform info using NvTegraSysGetPlatform().
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* - Return false if return info is NULL.
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* - Return true if any/all of the below condition is true.
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* - Info is "system_fpga" or
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* - Info is "unit_fpga".
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* @return Returns true if it's fpga else returns false.
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*/
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bool nvgpu_platform_is_fpga(struct gk20a *g);
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/**
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* @brief Check whether running in virtualized environment.
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*
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* @param g[in] GPU super structure.
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*
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* - Return true if NvHvCheckOsNative() is successful.
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*
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* @return Returns true if it's virtualized environment else returns false.
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*/
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bool nvgpu_is_hypervisor_mode(struct gk20a *g);
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/**
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* @brief Check whether bpmp server is runing.
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*
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* @param g[in] GPU super structure.
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*
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* @return Returns true if bpmp server is running else returns false.
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*/
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bool nvgpu_is_bpmp_running(struct gk20a *g);
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/**
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* @brief Check whether soc is t194 and revision a01.
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*
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* @param g[in] GPU super structure.
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*
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* - Return true only if NvTegraSysGetChipId() is equal to TEGRA_CHIPID_TEGRA19
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* and NvTegraSysGetChipRevision() is equal to TEGRA_REVISION_A01.
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* @return Returns true if soc is t194-a01 else returns false.
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*/
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bool nvgpu_is_soc_t194_a01(struct gk20a *g);
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/**
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* @brief Do soc related init
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*
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* @param g[in] GPU super structure.
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*
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* - Set VMID_UNINITIALIZED to r->gid.
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* - Check if nvgpu_is_hypervisor_mode is enabled if yes then
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* - If module is not virtual then set nvgpu_hv_ipa_pa to desc->phys_addr.
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*
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* @return Returns 0 on success or in case of failure, a suitable error code.
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*/
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int nvgpu_init_soc_vars(struct gk20a *g);
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/**
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* @brief OS specific implementation to provide precise microsecond delay
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*
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* @param usecs[in] Delay in microseconds.
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*
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* - Wait using nanospin_ns until usecs expires. Log error if API returns non
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* zero value once wait time expires.
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*
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* @return None.
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*/
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void nvgpu_delay_usecs(unsigned int usecs);
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#ifdef CONFIG_NVGPU_NON_FUSA
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u64 nvgpu_us_counter(void);
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#endif
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/**
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* @brief Get GPU cycles.
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*
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* @param None.
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*
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* @return 64 bit number which has GPU cycles.
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*/
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u64 nvgpu_get_cycles(void);
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#endif /* NVGPU_SOC_H */
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