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869735cda4
Add gv11b and tu104 HALs to get allowed HWPM resource register ranges, offsets, and stride meta data. Add new enum nvgpu_pm_resource_hwpm_register_type for HWPM register type. Add new struct nvgpu_pm_resource_register_range_map to store all the register ranges for HWPM resources. Add pointer of map in struct nvgpu_profiler_object along with map entry count. Add new API nvgpu_profiler_build_regops_allowlist() to build the regops allowlist dynamically while binding the resources. Map entry count is received with get_pm_resource_register_range_map_entry_count() and only those resource ranges are added for which resource is reserved by profiler object. Add nvgpu_profiler_destroy_regops_allowlist() to destroy the allowlist while unbinding the resources. Add static functions allowlist_range_search() to search a register offset in HWPM resource ranges. Add another static function allowlist_offset_search() to search the offset in per-resource offset list. Add nvgpu_profiler_validate_regops_allowlist() that accepts an offset value, checks if it is in allowed ranges using allowlist_range_search() and then checks if offset is in allowlist using allowlist_offset_search(). Update gops.regops.exec_regops() to receive profiler object pointer as a parameter. Invoke nvgpu_profiler_validate_regops_allowlist() from validate_reg_ops() if prof pointer is not-null. This will be true only for new profiler stack and not legacy profilers. In gr_exec_ctx_ops(), skip regops execution if offset is invalid. Bug 2510974 Jira NVGPU-5360 Change-Id: I40acb91cc37508629c83106ea15b062250bba473 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2460001 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Antony Clince Alex <aalex@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
42 lines
1.6 KiB
C
42 lines
1.6 KiB
C
/*
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* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_DBG_VGPU_H
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#define NVGPU_DBG_VGPU_H
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struct dbg_session_gk20a;
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struct nvgpu_dbg_reg_op;
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struct nvgpu_profiler_object;
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struct gk20a;
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struct nvgpu_channel;
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int vgpu_exec_regops(struct gk20a *g,
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struct nvgpu_tsg *tsg,
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struct nvgpu_profiler_object *prof,
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struct nvgpu_dbg_reg_op *ops,
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u32 num_ops,
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u32 *flags);
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int vgpu_dbg_set_powergate(struct dbg_session_gk20a *dbg_s,
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bool disable_powergate);
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#endif /* NVGPU_DBG_VGPU_H */
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