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ed16377983
To enable userspace query about comptags allocation status of a buffer, comptags are to be allocated only during buffer registration done by nvrm_gpu. Earlier, they were allocated during map. nvrm_gpu will be sending metadata blob to be associated with the buffer. This will have to be stored in the dmabuf privdata for all the buffers registered by nvrm_gpu. This patch moves the privdata allocation to buffer registration ioctl. Remove g->mm.priv_lock as it is not needed now. This lock was added to protect dmabuf private data setup. That private data is now handled through dmabuf->ops and setup of dmabuf->ops is done under dmabuf->lock. To support legacy userspace, this patch still allocates comptags on demand on map calls for unregistered buffers. Bug 200586313 Change-Id: I88b2ca04c733dd02a84bcbf05060bddc00147790 Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2480761 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
127 lines
3.7 KiB
C
127 lines
3.7 KiB
C
/*
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* Copyright (c) 2017-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef NVGPU_DMABUF_PRIV_H
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#define NVGPU_DMABUF_PRIV_H
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#include <linux/dma-buf.h>
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#include <nvgpu/comptags.h>
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#include <nvgpu/list.h>
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#include <nvgpu/lock.h>
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#include <nvgpu/gmmu.h>
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#include <nvgpu/user_fence.h>
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struct sg_table;
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struct dma_buf;
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struct dma_buf_attachment;
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struct device;
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struct nvgpu_os_linux;
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struct gk20a;
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struct gk20a_buffer_state {
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struct nvgpu_list_node list;
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/* The valid compbits and the fence must be changed atomically. */
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struct nvgpu_mutex lock;
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/*
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* Offset of the surface within the dma-buf whose state is
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* described by this struct (one dma-buf can contain multiple
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* surfaces with different states).
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*/
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size_t offset;
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/* A bitmask of valid sets of compbits (0 = uncompressed). */
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u32 valid_compbits;
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/* The ZBC color used on this buffer. */
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u32 zbc_color;
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/*
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* This struct reflects the compression state of the associated buffer
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* when this fence signals. The fence is provided to userspace via
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* struct nvgpu_gpu_prepare_compressible_read_args.
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*/
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struct nvgpu_user_fence fence;
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};
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static inline struct gk20a_buffer_state *
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gk20a_buffer_state_from_list(struct nvgpu_list_node *node)
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{
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return (struct gk20a_buffer_state *)
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((uintptr_t)node - offsetof(struct gk20a_buffer_state, list));
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};
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struct gk20a_dmabuf_priv {
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struct nvgpu_mutex lock;
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struct gk20a *g;
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struct gk20a_comptag_allocator *comptag_allocator;
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struct gk20a_comptags comptags;
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u8 *metadata_blob;
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u32 metadata_blob_size;
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bool registered;
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bool mutable_metadata;
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struct nvgpu_list_node states;
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/* Used for retrieving the associated dmabuf from the priv */
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struct dma_buf *dmabuf;
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/* 'dma_buf->ops' which is a pointer to a constant struct is
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* altered to point to the local copy for the entire lifetime
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* of this existing dma-buf until the driver is shutdown or
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* the last reference to this dma_buf instance is put. This local
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* copy replaces the 'release' callback with nvgpu's custom
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* release function handler. This custom function handler frees the
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* priv structure and replaces back the original pointer associated
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* with the 'producer' of the dma_buf.
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*/
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struct dma_buf_ops local_ops;
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/* Store a copy of the original ops for later restoration */
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const struct dma_buf_ops *previous_ops;
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/* list node for tracking the dmabuf_priv instances per gpu */
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struct nvgpu_list_node list;
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};
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struct sg_table *nvgpu_mm_pin(struct device *dev,
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struct dma_buf *dmabuf,
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struct dma_buf_attachment **attachment,
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enum dma_data_direction direction);
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void nvgpu_mm_unpin(struct device *dev,
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struct dma_buf *dmabuf,
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struct dma_buf_attachment *attachment,
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struct sg_table *sgt);
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void gk20a_mm_delete_priv(struct gk20a_dmabuf_priv *priv);
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int gk20a_dmabuf_alloc_or_get_drvdata(struct dma_buf *dmabuf, struct device *dev,
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struct gk20a_dmabuf_priv **priv_ptr);
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int gk20a_dmabuf_get_state(struct dma_buf *dmabuf, struct gk20a *g,
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u64 offset, struct gk20a_buffer_state **state);
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void gk20a_dma_buf_priv_list_clear(struct nvgpu_os_linux *l);
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struct gk20a_dmabuf_priv *gk20a_dma_buf_get_drvdata(
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struct dma_buf *dmabuf, struct device *device);
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#endif
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